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5282 Commits

Author SHA1 Message Date
Boris Brezillon 34ffa4cd10 nir/lower_blend: Fix nir_blend_logicop() for 8/16-bit integer formats 
src and dst can be integer types, and doing an f2f on such types
messes up with the original value. Make sure we keep the original type
when {up,down}sizing the src, dst and out values.

Fixes: f3de2bd6c2 ("nir: Add blend lowering pass")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28839>
 2024-04-22 09:58:41 +02:00
Ian Romanick a5adbae6f6 nir: intel/brw: Remove cmat_signed_mask from dpas_intel intrinsic 
It is not used. The signedness is inferred from src_type and dest_type.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28822>
 2024-04-19 09:53:29 -07:00
Mike Blumenkrantz a83fd26d0e nir/print: stop trying to match i/o vars using base/driver_location 
this is broken

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28552>
 2024-04-18 15:30:47 +00:00
Mike Blumenkrantz 6ae2147dd6 nir: print i/o variables in location order 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25036>
 2024-04-17 00:46:40 +00:00
Iván Briano 53e130e333 nir/lower_doubles: preserve NaN when asked to do so 
v2: avoid generating unnecessary bcsel (Caio)

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28702>
 2024-04-16 13:34:48 -07:00
Iván Briano c6c52113a0 nir/lower_doubles: preserve sign of zero if we are asked to 
v2: avoid generating unused instructions (Caio)

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28702>
 2024-04-16 13:34:46 -07:00
Iván Briano 5218cff34b nir/algebraic: avoid double lowering of some fp64 operations 
The ffloor@64 case, which lowers to use ffract, is already ignored if
nir_lower_dfract is set. Do the same thing for ftrunc@64 and ffract@64
and let nir_lower_doubles take care of them directly instead.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28702>
 2024-04-16 13:34:36 -07:00
Marek Olšák c15498afbe nir/use_dominance: set the root as post-dominator of unmovable instructions 
Some uses don't have any post-dominator. An example is an atomic that
feeds itself in a loop. No instruction immediately post-dominates
the result of such an atomic because no instruction can strictly
post-dominate itself. This handles that case generally by setting
the root node as the post-dominator for instructions that can't be
reordered.

Fixes: ba54099dce - nir: add a utility computing post-dominance of SSA uses

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28436>
 2024-04-15 22:50:26 +00:00
Mike Blumenkrantz 98ce4a98ae nir/remove_unused_io_vars: check all components to determine variable liveness 
this otherwise only checked the first component

cc: mesa-stable

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28751>
 2024-04-15 20:07:30 +00:00
Timur Kristóf 2b1031ec10 nir/opt_varyings: Add workaround for RADV mesh shader multiview. 
The layer output is added in ac_nir_lower_ngg which is called
later than this pass; prevent deleting layer input from FS here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:12 +00:00
Timur Kristóf 91dd9c35be nir/opt_varyings: Fix relocate_slot so it doesn't mix up 32-bit and 16-bit I/O. 
Previously, nir_opt_varyings was unable to distinguish between
a fully occupied 32-bit flat input and the low part of a 16-bit
flat input, and would assign them the same slot, thereby messing
up both I/O slots in the process.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:12 +00:00
Timur Kristóf 7e43c2d08f nir/opt_varyings: Debug print during relocate_slot. 
VERY useful when debugging issues with this pass.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf bf2227d0d0 nir/opt_varyings: Only propagate constant MS outputs, not other uniforms. 
Due to how mesh shaders work, we'll need a workgroup divergence
pass in order to really prove that an output is uniform.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 5dd1461ca4 nir/opt_varyings: Add early return when producer stage is task. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf a083a25a80 nir/opt_varyings: Fix explicit and per-vertex FS inputs. 
Fixes: 772149b15a
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 586acb47c8 nir/opt_varyings: Support per-primitive I/O. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 21ff2907c7 nir/opt_varyings: Allow optimizing primitive ID for MS -> FS. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 8792098772 nir/lower_io_to_scalar: Support per-primitive outputs. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 38bd578029 nir/lower_io_to_scalar: Support explicit (and per-vertex) FS inputs. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 433fe2022c nir/gather_info: Clear per-primitive I/O masks at the beginning. 
Fixes: b085248819
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 28c0f6f369 nir/recompute_io_bases: Fix per-primitive inputs. 
This was a mistake, the decision shouldn't be based on shader info.

Fixes: 8a24610477
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Timur Kristóf 723b3d354e nir/print: Print per-primitive and explicit strict IO info. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28685>
 2024-04-14 19:51:11 +00:00
Marek Olšák fe35a8b00e nir: change "user_data_amd" sysval from 4 to 8 components 
so that we can pass more fast constants to compute shaders (without
reading memory in the shader).

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28606>
 2024-04-13 16:45:08 +00:00
Marek Olšák c1f750eed9 nir: add nir_intrinsic_optimization_barrier_sgpr_amd 
for radeonsi

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28606>
 2024-04-13 16:45:08 +00:00
Marek Olšák 6426f6de6a nir: allow FP16 in nir_format_linear_to_srgb 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28606>
 2024-04-13 16:45:08 +00:00
Marek Olšák 281e08714e nir: add more build helpers 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28606>
 2024-04-13 16:45:08 +00:00
Timothy Arceri fe2e60a4d3 glsl: add some data members to nir_variable 
These will be used in the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28690>
 2024-04-12 12:15:48 +10:00
Mike Blumenkrantz d2507a6916 nir/lower_clip: handle scalarized io 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28308>
 2024-04-11 18:57:26 +00:00
Mike Blumenkrantz 49714125d5 nir/lower_clip: surgerize for lowered io 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28308>
 2024-04-11 18:57:25 +00:00
Georg Lehmann 5e6e3c7f89 nir: rename to nir_opt_16bit_tex_image 
Not sure what I was thinking when I wrote this pass (probably not much),
but opt makes more sense and matches other nir passes.
Fold is usually used for constants, and this pass handles more than those.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28662>
 2024-04-11 06:10:33 +00:00
Georg Lehmann b44f97a7ba nir: don't try to optimize exclusive min/max scan to inclusive 
SPIR-V rules for fmax/fmin scans are *very* stupid.
The required identity is Inf instead of NaN but if one input
is NaN, the other value has to be returned.
This means for invocation 0:
min(subgroupExclusiveMin(NaN), NaN) -> Inf
subgroupInclusiveMin(NaN) -> undefined (NaN for any sane backend)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27536>
 2024-04-11 00:03:13 +00:00
Konstantin Seurer 85e840786c nir: Add lavapipe ray tracing intrinsics 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28187>
 2024-04-09 07:13:01 +00:00
Konstantin Seurer edc8e011eb nir/serialize: Encode data for temporaries 
the location has to be preserved when lowering them to scratch using
nir_lower_vars_to_explicit_types and nir_lower_explicit_io.

cc: mesa-stable

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28187>
 2024-04-09 07:13:01 +00:00
Konstantin Seurer 1ff8659f41 nir/print: Fix printing booleans with bit_size>1 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28187>
 2024-04-09 07:13:01 +00:00
Connor Abbott 42ddbf4ebe nir/divergence_analysis: Fix load_view_index divergence in VS 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28573>
 2024-04-08 23:20:08 +00:00
Connor Abbott 223e3727d5 nir/divergence_analysis: Add uniform_load_tears option 
This "tear" is similar to the original concept of loads/stores tearing,
but across invocations in a wave instead of bytes. Qualcomm seems to
have this problem, at least for some GPUs. This fixes
spec@arb_shader_storage_buffer_object@execution@ssbo-atomiccompswap-int
on a630 once we start relying on divergence analysis for computing
reconvergence properties. For backends that have readFirstInvocation(),
it should be possible to fix the problem by inserting
readFirstInvocation() instead, but a5xx doesn't have it so we can't rely
on it in freedreno.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28573>
 2024-04-08 23:20:08 +00:00
Connor Abbott 291e6d2940 nir/divergence_analysis: Add ir3-specific intrinsics 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28573>
 2024-04-08 23:20:08 +00:00
Pavel Ondračka 96479794a5 nir/lower_vec_to_regs: always set cursor before inserting decl_reg 
Otherwise we can end with invalid curson in some cases, specifically,
if we encounter an identity vector and thus neither register
declaration nor swizzle is inserted, it can lead to invalid cursor and a
crash later.

Suggested by: Alyssa Rosenzweig <alyssa@rosenzweig.io>

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10905
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28581>
 2024-04-08 21:03:46 +00:00
Rhys Perry 543ca160a5 nir,aco: add test intrinsics 
These don't really do anything. They're just a source and user of SSA
defs.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28301>
 2024-04-08 18:38:39 +00:00
Rhys Perry 863718d62e nir: add nir_remove_after_cf_node helper 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28301>
 2024-04-08 18:38:39 +00:00
Timothy Arceri baf13bff29 nir: add subroutine fields to nir_function 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28538>
 2024-04-06 05:56:04 +00:00
Timothy Arceri c46827d52a nir: add variable field from_ssbo_unsized_array 
This will be used for validation in following patches

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28538>
 2024-04-06 05:56:03 +00:00
Timothy Arceri a18e06f694 nir: add implicit_sized_array data field 
Will be used in following patches for glsl linking validation.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28538>
 2024-04-06 05:56:03 +00:00
Timothy Arceri f24e6a5062 nir: add max_array_access data field 
Will be used in following patches for glsl linking validation.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28538>
 2024-04-06 05:56:03 +00:00
Mike Blumenkrantz a9d366085c nir/gather_info: fix gathering for compact arrayed builtins 
these are treated as vecs, but depending on driver caps num_slots
may or may not equal the array size

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28554>
 2024-04-05 17:56:28 +00:00
Mike Blumenkrantz 843614f45a nir: add compact_arrays to nir_shader_compiler_options 
this is used to inform passes about semantics for compact array builtins

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28554>
 2024-04-05 17:56:28 +00:00
Rhys Perry 08903bbe89 nir: add mqsad_4x8, shfr and nir_opt_mqsad 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26251>
 2024-04-05 11:01:39 +00:00
Mike Blumenkrantz 56cda23459 nir/dominance: fix comment 
this function doesn't exist

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28463>
 2024-04-04 18:58:43 +00:00
Mike Blumenkrantz 0851c30d16 nir/texcoord_replace: fix scalarized io handling 
if a texcoord load only loads some components, only those components
should be replaced

cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28463>
 2024-04-04 18:58:43 +00:00
Mike Blumenkrantz f3d9a2e607 nir/lower_point_size_mov: fix for lowered io 
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28463>
 2024-04-04 18:58:42 +00:00