Commit Graph

128364 Commits

Author SHA1 Message Date
Alyssa Rosenzweig 2ff53879f2 pan/bi: Use new packing
...and remove the old manual code.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 3fadd82346 pan/bi: Move packing helpers to dedicated file
We'll need to access them from the autogenerated section.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig d2158a5b30 pan/bi: Use src1/dest_invert instead of src_invert[]
This maps more closely to the hardware, which makes for easier packing.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 08b105d782 pan/bi: Use 8-bit shifts
Logically, it doesn't matter, but we want the IR to accurately reflect
the hardware behaviour.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 3d63a476f7 pan/bi: Pass blend descriptor explicitly in IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 67d89568af pan/bi: Track compute_lod in IR
We'll need to differentiate tex and txl.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 8dd3a81c1d pan/bi: Add format field to IR
To make register_format packing explicit, and possibly in the future
support the auto mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 6f5b78874a pan/bi: Introduce segments into the IR
Needed to select between global, UBO, TLS, and WLS addressing modes,
required to implement loads/stores correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 33710ff895 pan/bi: Add dummy carry/borrow argument for iadd/isub
On FMA, a carry/borrow is required for iaddc/isubb (whereas the ADD
counterparts don't support carrying/borrowing). The trick is to model
this with an extra dummy (ZERO) argument which is free to encode on FMA,
and in the scheduler, "demote" to the non-carried versions if we want to
schedule to ADD.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 42ec4aa478 pan/bi: Use canonical syntax for special constants
Adds some missing constants relevant to compute shaders, etc.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 5a569d09f4 pan/bi: Use canonical syntax for registers/uniforms/imms
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig f8fc21059f pan/bi: Use new disassembler
We still use the clause/register decoding, but we now use the
metaprogrammed instruction decoding for the bulk of the operation.

We add a meson rule to call out to the Python generator script during
the build process.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig deab75250c pan/bi: Export dump_src
Needed in generated disassembler.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 05041811ce pan/bi: Add bi_disasm_dest_* helpers
Used to print the actual register/temporary for an instruction
destination given the port arrangement.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 944cb8bcba pan/bi: Add disassembly prototypes
Fix a header guard too.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 82f33155f6 pan/bi: Add disassembler generator
Given a parsed instruction set definition, this script generates
instruction disassembly routines responsible for decoding instruction
words and pretty-printing. Decoding is somewhat complex as with the
previous disassembler but can be automated.

Disssembly is complicated by indirect specifications of instruction
modifiers. These specifiers are given as logic expressions in the XML,
which optimizes for straightforwaard packing but makes disassembly
awkward. Instead of attempting to invert the logic directly, we generate
lookup tables of `modifiers -> encoding` maps which we may invert
directly to produce a lookup table for the `encoding -> modifiers` map
needed for disassembly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig cf8f79a9fc pan/bi: Add packing generator
From the ISA definition, we can generate a function for each instruction
that looks at the bi_instruction in the intermediate representation and
emits a 20- or 23-bit word (for ADD/FMA respectively) containing that
instruction with all of its modifiers.

These will approximate the old packing routines, although the mapping of
bi_instruction to machine instructions will be hardcoded (at least for
now).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 58da316de7 pan/bi: Add ISA parser
This Python script parses the ISA.xml file to produce a normalized
in-memory representation suitable for the disassembly and packing
scripts to consume. In particular, it papers over details about
duplicate encodings and default fields.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 07a5ec83fb pan/bi: Add XML describing the instruction set
Throughout this series, this XML file will serve as architectural ground
truth. It contains every instruction in the instruction set with all
programmable modifiers, as well as logic for computing derived values
(indirectly specified modifiers) and swapping operands as needed by
numerous encodings. It also allows for multiple encodings per
instruction differentiated by exact bits (a generalization of opcodes),
with different derived fields in each encoding, and logic tests to
select between the encodings at pack time.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Alyssa Rosenzweig 2044b1fba5 pan/bi: Lower flrp16
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Fixes: 3c8934a644 ("nir/algebraic: add flrp patterns for 16 and 64 bits")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
2020-09-16 20:05:34 +00:00
Mike Blumenkrantz b75a92e201 anv: assert that the target bo is valid when adding a reloc list
this catches some undefined behavior like e.g., using a stale descriptorset
that references deleted bos, which I would absolutely never do

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6747>
2020-09-16 19:58:16 +00:00
Mike Blumenkrantz 355f241d41 anv: improve error message when failing to open device path
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6747>
2020-09-16 19:58:16 +00:00
Eric Engestrom 203b934921 docs: update calendar and link releases notes for 20.1.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6748>
2020-09-16 19:43:27 +02:00
Eric Engestrom fdff24d930 docs: add release notes for 20.1.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6748>
2020-09-16 19:43:07 +02:00
Gert Wollny 123bdb61cc gallium+mesa/st: lower uniforms based on compiler flag instead of packed uniforms cap
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
2020-09-16 10:07:42 +00:00
Gert Wollny feb463da63 llvmpipe: set lower_uniform_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
2020-09-16 10:07:42 +00:00
Gert Wollny 80cde3ad55 intel/compiler: Set lower_uniform_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
2020-09-16 10:07:42 +00:00
Gert Wollny 7ab804dbb4 freedreno/ir3: set lower_uniforms_to_ubo compiler flag
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
2020-09-16 10:07:42 +00:00
Gert Wollny b155b6869c radeonsi: set compiler flag lower_uniforms_to_ubo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
2020-09-16 10:07:42 +00:00
Gert Wollny 2c9fee9b6a nir: Add option lower_uniforms_to_ubo
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6316>
2020-09-16 10:07:42 +00:00
Erik Faye-Lund 8939c642e0 gallium/aux: remove unused u_blit.[ch]
There's no users of this code, so we might as well get rid of it to
avoid confusion with u_blitter.[ch].

Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6651>
2020-09-16 08:37:13 +00:00
Erik Faye-Lund 9ba2365c6f vc4: remove unused header
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6651>
2020-09-16 08:37:13 +00:00
Erik Faye-Lund 9992797e1b v3d: remove unused header
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6651>
2020-09-16 08:37:13 +00:00
Gert Wollny 39e7bc23dd r600/sfn: Fix comparison with different signedness
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny 2d6316cca4 r600/sfn: more fixing of vec4 fetching
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny f46e04a1c4 r600/sfn: Fix source swizzle for gradient queries
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny 02581acd07 r600/sfn: Fix bitfield ops and 2x16 split_y
Don't reuse the dest register to make instruction dependency tracking
easier.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny dfa45e26e2 r600/sfn: Fix split_alu_modifiers
Don't reuse the dest register so we can better track instruction
dependencies later.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny e85c0bdda5 r600/sfn: Lower *sign opcodes in nir
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny c22e0fb02d r600/sfn: avoid some copies
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny f2280e03e2 r600/sfn: Fix ordering of tex param moves
Both moves should happen in the same instuction group, otherwise the
lod/bias value will be overwritten by the shadow compare value.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny daaa71924a r600/sfn: clone shader before lowering to registers and src/dest modifiers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny 09558ad84e r600/sfn: Fix loading vertex attributes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny e46b2ad127 r600/sfn: correct ring op patching
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny 688680decc r600/nir: fetch sources and split uniforms before emittting alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Gert Wollny 85f39cab8b r600: revert disabling llvm draw
Now that llvm supports NIR and lowers uniforms to UBO in draw
calls when this hasn't be done before this can be used again.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6706>
2020-09-16 08:30:41 +00:00
Pierre-Eric Pelloux-Prayer f1730bed8f radeonsi: fix guardband handling for large values
When minx = -32768 (ViewportBounds.Min) we'll hit the "left <= -1, ..."
assert because 'left' is computed as:

   (-65535 / 2 - translate_x) / (minx - translate_x)

This commit fixes the problem by using the full max_viewport_size => [-32768, 32767]
instead of [-32767, 32767] for SI_QUANT_MODE_16_8_FIXED_POINT_1_256TH.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3502
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6685>
2020-09-16 09:54:11 +02:00
Pierre-Eric Pelloux-Prayer c493bb9a57 radeonsi: fix quant_mode selection for large negative values
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6685>
2020-09-16 09:54:09 +02:00
Pierre-Eric Pelloux-Prayer 7d853966df radeon/vcn: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308
Cc: mesa-stable
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
2020-09-16 08:45:00 +02:00
Pierre-Eric Pelloux-Prayer eb60849ea2 r600/uvd: set dec->bs_ptr = NULL on unmap
To avoid using a dangling pointer.
See https://gitlab.freedesktop.org/mesa/mesa/-/issues/1308

Cc: mesa-stable
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6556>
2020-09-16 08:44:24 +02:00