2f1014e41d
st/draw: remove st_draw_vbo
...
Driver.Draw is now unused for Gallium drivers - except for st_cb_feedback which
sets its own Draw function.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Acked-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10066 >
2021-04-12 07:36:28 +02:00
d32512effc
vulkan/util: Use util_bitcount
...
__builtin_popcount is not available on all compilers.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com >
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10159 >
2021-04-12 03:25:59 +00:00
80b96a2158
st/mesa: adapt for the case where buffers are not supported in frag
...
Some logic was tuned to buffers / atomics / images being supported in
frag stages in order to expose any support at all. Fix some of these
assumptions.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10161 >
2021-04-11 22:30:18 -04:00
0dfc5b5196
nv50/ir: fix emission of ld/st lock/unlock
...
This is necessary to implement shared atomics.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
d0fa6e066b
nv50/ir: avoid inlining results of a locked load
...
These are a bit special. Among other things, removing them will cause us
to potentially remove the load itself, defeating the purpose of the
locking. Also it's unclear whether it's legal to access the shared
memory directly when it's locked like this.
This only comes up on nv50, since on nvc0+, shared memory can't be
loaded from random ops.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
7052927ee4
nv50: fix expression for ucp offset
...
It doesn't matter since it's 0, but all the offsets are in bytes whereas
the method expects words. So adjust by 2.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
52172fded5
nv50/ir: fix emission of cas without a destination
...
We were previously dumping $r127 in there. This has a bad effect on
nv50, so make sure we allocate an actual register for it, even if
there's nothing using the result.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
a3b02fea7e
nv50/ir: fix emission of 16-bit add
...
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
fe93723aaa
nv50/ir: add support for 16-bit immediates
...
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
8a69efa171
nv50/ir: logic ops on half-regs can't take an immediate
...
There does not appear to be an instruction form for this. Prevent an
immediate from being loaded into place.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
afcd296b1b
nv50/ir: fix emission of shifts on half-regs
...
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
af8665c3a5
nv50/ir: fix emission of logic ops on half-regs
...
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
96e8e74813
nv50/ir: fix emission of cvt with half-reg destinations
...
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
c6b02c097f
nv50/ir: fix emitting movs from imm to short registers
...
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
2ff2d65799
nv50/ir: lower buffer to global
...
The idea is that buffers will be bound to the appropriate indices. That
means that we can just rename them to global.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
ee28cae1ef
nv50/ir: fix emission of RED
...
When the atomic result is unused, the opcode form needs to be a bit
different.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
1fad964553
nv50/ir: do not use inline offsets for global, ensure indirect access
...
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
3e99271163
nv50/ir: force shared memory indirect to be an address
...
The upstream logic will not end up using an address, so we have to force
it here. The other backends don't care either.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
d2a0aa5efe
nv50/ir: retrieve (n)ctaid.z from first user param
...
The driver is responsible for feeding this in.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
de71feccbf
nv50: pass in third axis via user param
...
This is probably not the most efficient way to go for all geometries,
but the assumption is that kernels tend to be x/y-heavy rather than
z-heavy. Iterates over each z slice and passes in the current value via
user param. (And bump all user params by a dword.)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:22 -04:00
c3e9be9b5a
nv50: add texture, constbuf, image, buffer validation
...
This makes compute mostly work. For now we're laying out images/buffers
in a fixed offset from each other in the globals "array", but this
should be done dynamically. We're also missing passing image info to
shaders, as well as adding image formats to a shader key.
Heavily inspired by nvc0 variants of these.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Acked-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 12:31:14 -04:00
1a6a772527
nv50: implement memory barrier handling
...
With shader images / buffers, we can get more complex barrier requests.
This mirrors the logic in nvc0.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 11:47:42 -04:00
cd296c9f8c
nv50: add resource tracking for shader images and buffers
...
Heavily inpsired by the nvc0 code. Note that these only exist for the
compute stage, so there is no shared-based indexing.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 11:47:42 -04:00
ba6ba8c990
nv50: adapt texture and constbuf paths for compute shaders
...
This contains the logic updates necessary to perform necessary resource
tracking and emit update / flush commands for the relevant stages.
Inspired by some changes from Pierre Moreau.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Reviewed-by: Pierre Moreau <dev@pmoreau.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 11:47:42 -04:00
9abfd4ba18
nv50: Update texture indices to match stage indices
...
For legacy reasons, we were using the PIPE order, instead of the
hardware order. Reorder the stages to match the order of the
BIND_TIC/etc methods, and adjust internal usage to match.
Signed-off-by: Pierre Moreau <dev@pmoreau.org >
[imirkin: fixed numbering, removed TODO comments]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 11:47:42 -04:00
afe1472cde
nv50: Replace hardcoded texture/constbuf count with define
...
Signed-off-by: Pierre Moreau <dev@pmoreau.org >
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9299 >
2021-04-11 11:47:42 -04:00
2d6b7b2e0c
lima: enable rg formats for fp16 render
...
These were noticed by trial and error after fixing the fp16 render
setup.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9916 >
2021-04-11 10:06:50 +00:00
8393fad0de
lima: fix half float render
...
Format 0x26 is invalid, formats are in a 4 bit field so they repeat
in increments of 16.
Frame reg flags needs to set 0x01 to actually enable fp16.
The clear color setup is also a bit different for fp16, need to use
the 16 bit values in the first two clear color registers.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com >
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9916 >
2021-04-11 10:06:50 +00:00
ba8737bb86
pan/bi: Determine block successors correctly
...
Fixes GPU timeouts in Google Maps.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Reviewed-by: Icecream95 <ixn@disroot.org >
Tested-by: Icecream95 <ixn@disroot.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10145 >
2021-04-11 02:05:31 +00:00
492c8f1709
compiler/glsl: fix include for Android build
...
Sources outside of src/util path should include "util/string_buffer.h"
Fixes the following building error in Android:
external/mesa/src/compiler/glsl/ast_type.cpp:25:10: fatal error: 'string_buffer.h' file not found
^~~~~~~~~~~~~~~~~
1 error generated.
Fixes: eeec9d56adtapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10156 >
2021-04-10 20:33:52 +02:00
44ed8378bf
gallium/tools: update trace scripts to Python 3
...
Bring the scripts for parsing, dumping state and diffing of Gallium
trace files to modern day by updating them to Python 3.
Add option '-p' to some tools for outputting only plaintext
instead of ANSI / colorized format.
Also fix state parsing of some dumps by adding 'clear_render_target'
and 'get_disk_shader_cache' to ignored calls list.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4321
Signed-off-by: Matti Hamalainen <ccr@tnsp.org >
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9830 >
2021-04-10 14:00:45 +00:00
e7bece080f
zink: fix typo in function name
...
Suggested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10127 >
2021-04-10 09:48:38 +00:00
6940d3ba05
zink: document scalarBlockLayout requirement
...
We're currently using uint arrays instead of uvec4 arrays for UBOs and
SSBOs, which requires scalarBlockLayout. Fixing this is a lot of work,
so let's just document it for now.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10127 >
2021-04-10 09:48:38 +00:00
6a2ee3b17c
gallium/st: correct range for int16
...
This fixes the following dEQP tests:
- dEQP-GLES3.functional.shaders.operator.unary_operator.minus.lowp_uvec2_fragment
- dEQP-GLES3.functional.shaders.operator.unary_operator.minus.lowp_uvec4_fragment
- dEQP-GLES3.functional.shaders.operator.unary_operator.minus.mediump_uvec2_fragment
- dEQP-GLES3.functional.shaders.operator.unary_operator.minus.mediump_uvec4_fragment
Fixes: 1af8fe4ed5alyssa@collabora.com >
Tested-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10128 >
2021-04-10 09:22:12 +00:00
07a02a3390
gallium/st: correct range for float16
...
Fixes: b83f4b9fa2alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10128 >
2021-04-10 09:22:11 +00:00
a161cccd9b
glsl: tolerate int16 loop counters
...
When lowering precision on integers from GLSL ES, we can end up with
16 bit integer loop counters. So let's tolerate this as well.
This was probably not caught earlier because most NIR drivers disable
GLSL-level loop-unrolling, and no non-NIR driver sets LowerPrecisionInt16
to true. This was discovered while trying to wire up int16 support for
Zink, which doesn't currently disable GLSL loop-unrolling.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10125 >
2021-04-10 09:01:54 +00:00
c64e2bf2c3
glsl: fix int16 type
...
This shouldn't be unsigned, or else we'll trigger asserts.
Fixes: 7f00d4dac8alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10125 >
2021-04-10 09:01:54 +00:00
b718de746d
glsl: fix is_integer_16_32
...
This shouldn't check for 64-bit...
Fixes: a052a9c277alyssa@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10125 >
2021-04-10 09:01:54 +00:00
0a7a61b2d7
panfrost: Only do point coord replacement for PIPE_PRIM_POINTS
...
Fixes rendering in Terraria on Midgard.
Thanks to macc24 for reporting this and to HdkR for pointing me to a
similar issue for virgl.
Cc: mesa-stable
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10154 >
2021-04-10 16:56:39 +12:00
c43109c07b
anv: Use vk_object_alloc/free
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10123 >
2021-04-10 02:18:02 +00:00
22478bb0e4
vulkan: Add a vk_object_multialloc helper
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10123 >
2021-04-10 02:18:02 +00:00
2b19b7a165
anv: Clean up anv_semaphore::base on the error path
...
Fixes: 682c81bdfblionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10123 >
2021-04-10 02:18:02 +00:00
46749afe45
anv: Clean up anv_descriptor_pool::base on the error path
...
Fixes: 682c81bdfblionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10123 >
2021-04-10 02:18:02 +00:00
13036a62e4
anv: Refactor framebuffer creation
...
This avoids having the create call duplicated.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10123 >
2021-04-10 02:18:02 +00:00
e20c653781
anv: Clean up anv_device_memory::base on failure
...
Fixes: 682c81bdfblionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10123 >
2021-04-10 02:18:02 +00:00
fcd8aaf07a
radv: Update editorconfig.
...
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091 >
2021-04-10 03:31:58 +02:00
59c501ca35
radv: Format.
...
Using
find ./src/amd/vulkan -regex '.*/.*\.\(c\|h\|cpp\)' | xargs -P8 -n1 clang-format --style=file -i
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091 >
2021-04-10 03:31:58 +02:00
8451b41022
radv: Add clang-format for AMD code.
...
Copied from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883
with increased colum width as 80 really made a mess.
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091 >
2021-04-10 03:31:32 +02:00
51a812bb60
panfrost: Flush output after disassembling shaders
...
Fixes text printed to stderr appearing in the middle of disassembly
when piping stdout and stderr to the same place.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10088 >
2021-04-09 23:45:26 +00:00
81513085e5
android: anv: fix build error in anv_android.c
...
Fixes the following building error:
external/mesa/src/intel/vulkan/anv_android.c:568:13: error: no member named 'stride' in 'struct anv_image_create_info'
anv_info.stride = gralloc_info->stride *
~~~~~~~~ ^
1 error generated.
Fixes: afd2f489d3tapani.palli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10119 >
2021-04-10 00:44:30 +02:00
Pierre-Eric Pelloux-Prayer