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Author SHA1 Message Date
Icecream95 2e97d7c835 panfrost: Transaction elimination support 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7086>
 2021-01-20 23:43:39 +00:00
Icecream95 7707ccf286 panfrost: Add a debug flag to disable checksumming 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7086>
 2021-01-20 23:43:39 +00:00
Icecream95 fc69c423fd panfrost: Only checksum resources when it makes sense to 
To simplify tracking the checksum validity, only checksum 2D
resources.

The GPU cannot do checksumming when there is too much data to be
written out, so limit the number of bytes per pixel to an architecture
specific value.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7086>
 2021-01-20 23:43:39 +00:00
Icecream95 a1bf4be844 panfrost: Add a function to determine if a resource is 2D 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7086>
 2021-01-20 23:43:39 +00:00
Rob Clark 77398a9e41 radeonsi: Use util_writes_stencil() helper 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
 2021-01-20 23:15:47 +00:00
Rob Clark 04f8aa7c1e r300: Use util_writes_depth_stencil() helper 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
 2021-01-20 23:15:47 +00:00
Rob Clark c01aac141a freedreno/a6xx: Don't early-z if there are stencil writes 
Fixes a similar stencil related misrendering in a couple "RV AppStudios"
titles.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
 2021-01-20 23:15:47 +00:00
Rob Clark 7277342b5e gallium/util: Add helpers to determine if z/s is written 
For drivers that must control various 'early-z'-like state, it is easy
enough to get this wrong.  So add helpers so we don't have to duplicate
the logic in each driver.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8598>
 2021-01-20 23:15:47 +00:00
Marek Olšák bc0508ad38 radeonsi: allow instance_count == 0 on chips that handle it correctly 
Let's remove this overhead.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák 76d6351dab radeonsi: don't validate inlinable uniforms at draw time 
Let's trust the state tracker that it sets inlinable uniforms only
when shaders can use them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák 185a2472a4 radeonsi: move variables closer to their use in most draw state functions 
for lower register pressure, though I haven't measured this.

si_draw_vbo will be handled in a future commit.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák ae5df516f1 radeonsi: clear dirty_atoms and dirty_states only if we entered the emit loop 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák 2206840f6c radeonsi: enable the GS tri strip adj workaround with primitive_restart 
If a primitive restart index occurs after an even number of triangles,
the workaround works.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák 888a45a362 radeonsi: evaluate si_get_vs in si_draw_vbo at compile time 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák c5d3341b6e radeonsi: inline the last use of si_get_vs_state 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák 5f7715083b radeonsi: evaluate sh_base in si_emit_vs_state at compile time 
This computes the value at compile time because si_get_user_data_base is
always inlined.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák e8ccb6f0f3 radeonsi: add si_get_user_data_base selecting user data registers 
This will be used in templated si_draw_vbo in place of sh_base.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák 88a02d80de radeonsi: don't set context_roll for non-gfx9 in templated functions 
It's not needed by other chips.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák 581a96bc44 radeonsi: don't pass pipe_draw_info into si_emit_draw_registers 
Only two fields are used. It's probably better this way.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Marek Olšák ac2b4aa08f radeonsi: unify uploaders on APUs too 
const_uploader and stream_uploader point to the same uploader.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8600>
 2021-01-20 21:53:13 +00:00
Matt Turner facd34431b docs/freedreno: Fix a few typos 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8599>
 2021-01-20 21:44:48 +00:00
Jesse Natalie 13b21156e4 nir: Work around MSVC x86 internal compiler error 
Fixes: 1fd8b466 ("nir,spirv: add sparse image loads")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4108
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8581>
 2021-01-20 20:42:48 +00:00
Lionel Landwerlin 28207669d0 anv: Fix stencil layout in render passes 
We incorrectly utilize the stencil layouts structures even if we
should stick to the depth_stencil ones if the layout includes stencil.

v2: Don't forget stencil only layout (Nanley)
    Simplify callers of new helper functions (Nanley)

v3: Store VK_IMAGE_LAYOUT_UNDEFINED when no stencil is available (Nanley)
    Use a switch statement (Nanley)

v4: Consider all layouts but depth only to be potential stencil layouts (Lionel)

v5: Refactor helper in vk_image_layout_depth_only() and discard
    VkAttachmentDescriptionStencilLayoutKHR in
    VkAttachmentDescription2KHR if format is not depth/stencil.

v5: s/LAYOUT_COLOR_ATTACHMENT_OPTIMAL/LAYOUT_DEPTH_ATTACHMENT_OPTIMAL/ (Nanley)

v6: Fix overly harsh assert()

Fixes: c1c346f166 ("anv: implement VK_KHR_separate_depth_stencil_layouts")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4084
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8475>
 2021-01-20 20:36:34 +00:00
Eric Anholt f79f382c81 nir_to_tgsi: Store directly to TGSI outputs when possible. 
Saves emitting a MOV at the end of the program to store the output.

softpipe glmark2 -b buffer +9.73451% +/- 3.17924% (n=6)
softpipe glmark2 -b build +5.57621% +/- 1.35074% (n=9)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8023>
 2021-01-20 19:48:59 +00:00
Eric Anholt f6e35e5fd0 ci/freedreno: Fix xfail setup for sampler3d_float_vertex. 
I mised the ",Fail" status, so it just wasn't interpreted.  I should make
the runner throw an error instead.

Fixes: 22bf4831b8 ("ci/freedreno: Fix up the xfail/flake handling of a3xx texture functions.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8596>
 2021-01-20 19:02:48 +00:00
Rhys Perry 914c61d6c0 radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2 
Fixes several dEQP-VK.robustness.robustness2.* tests on GFX8. Generations
other than GFX8 don't fail the tests because bounds-checking is done using
the index (making it per-vertex).

fossil-db (Polaris):
Totals from 1387 (0.99% of 140385) affected shaders:
(no statistics affected)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 03a0d39366 ("aco: use MUBUF in some situations instead of splitting vertex fetches")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7834>
 2021-01-20 17:57:56 +00:00
Samuel Pitoiset 4eec0fb55c radv: remove redundant check in depth_view_can_fast_clear() 
We check below if HTILE is in compressed state, so checking if
the image has HTILE is useless because radv_layout_is_htile_compressed()
will return FALSE if no HTILE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8579>
 2021-01-20 17:18:39 +00:00
Samuel Pitoiset 27d4a15528 radv: remove unnecessary radv_image::tc_compatible_htile 
Use the surface flags directly instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8579>
 2021-01-20 17:18:39 +00:00
Samuel Pitoiset c30f010e8f radv: remove redundant check in radv_process_depth_stencil() 
This is already checked in radv_handle_depth_image_transition().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8579>
 2021-01-20 17:18:39 +00:00
Rohan Garg d245d7b6b8 virgl: Cache depth and stencil buffers 
Expand the list of bind flags to cache depth and stencil
buffers.

Extensive testing shows the following performance improvements:

Game           |    % difference in FPS
Plague Inc     |             7
Portal 2       |             21
Overcooked 2   |             1.2
Hollow Knight  |            -1.1
Civilization V |             3.8

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8560>
 2021-01-20 17:09:25 +00:00
Rhys Perry af9977a3d5 aco: add affinity for non-sequential MIMG operands 
fossil-db (GFX10.3):
Totals from 42008 (30.14% of 139391) affected shaders:
VGPRs: 2139116 -> 2147696 (+0.40%); split: -0.06%, +0.46%
CodeSize: 199109120 -> 198637852 (-0.24%); split: -0.24%, +0.01%
Instrs: 37713901 -> 37714574 (+0.00%); split: -0.02%, +0.03%
Cycles: 1621911328 -> 1621634168 (-0.02%); split: -0.02%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Rhys Perry 4015b3651a aco: only require texture coordinates to be in WQM if NSA is used 
From comment in emit_mimg():
We don't need the bias, sample index, compare value or offset to be
computed in WQM but if the p_create_vector copies the coordinates, then it
needs to be in WQM.

fossil-db (GFX10.3):
Totals from 1778 (1.28% of 139391) affected shaders:
SGPRs: 105080 -> 105072 (-0.01%); split: -0.02%, +0.01%
VGPRs: 96800 -> 96776 (-0.02%); split: -0.07%, +0.05%
CodeSize: 10001120 -> 10001384 (+0.00%); split: -0.04%, +0.04%
MaxWaves: 18164 -> 18163 (-0.01%)
Instrs: 1883750 -> 1883598 (-0.01%); split: -0.06%, +0.05%
Cycles: 34800176 -> 34767840 (-0.09%); split: -0.10%, +0.01%

We don't have a p_create_vector if we use NSA.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Rhys Perry c353895c92 aco: use non-sequential addressing 
fossil-db (GFX10.3):
Totals from 70493 (50.57% of 139391) affected shaders:
SGPRs: 4232624 -> 4231808 (-0.02%); split: -0.09%, +0.07%
VGPRs: 2831772 -> 2764740 (-2.37%); split: -2.53%, +0.17%
CodeSize: 225584412 -> 225048740 (-0.24%); split: -0.44%, +0.21%
MaxWaves: 875319 -> 878837 (+0.40%); split: +0.44%, -0.04%
Instrs: 43157803 -> 42496421 (-1.53%); split: -1.54%, +0.01%
Cycles: 1656380132 -> 1641532056 (-0.90%); split: -0.94%, +0.04%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Rhys Perry faf3e9a27f aco: move VADDR to the end of the operand list 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Rhys Perry cd29210fce aco: add emit_mimg() helper 
Some fossil-db noise from slightly different order of instructions.

fossil-db (GFX10.3):
Totals from 73 (0.05% of 139391) affected shaders:
SGPRs: 3424 -> 3440 (+0.47%)
CodeSize: 199076 -> 199064 (-0.01%); split: -0.01%, +0.00%
Instrs: 37303 -> 37300 (-0.01%); split: -0.01%, +0.00%
Cycles: 786328 -> 786316 (-0.00%); split: -0.00%, +0.00%
VMEM: 19448 -> 19454 (+0.03%); split: +0.04%, -0.01%
SMEM: 5241 -> 5305 (+1.22%); split: +1.70%, -0.48%
SClause: 1282 -> 1281 (-0.08%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Rhys Perry 9890dabb1b aco: have emit_wqm() take Builder instead of isel_context 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Rhys Perry 489aa8c7cb aco: fix num_waves on GFX10+ 
There are half the SIMDs per CU and physical_vgprs should be 512 instead
of 256.

fossil-db (GFX10.3):
Totals from 3622 (2.60% of 139391) affected shaders:
VGPRs: 298192 -> 289732 (-2.84%); split: -3.43%, +0.59%
CodeSize: 29443432 -> 29458388 (+0.05%); split: -0.00%, +0.06%
MaxWaves: 21703 -> 23395 (+7.80%); split: +7.84%, -0.05%
Instrs: 5677920 -> 5681438 (+0.06%); split: -0.01%, +0.07%
Cycles: 280715524 -> 280895676 (+0.06%); split: -0.00%, +0.07%
VMEM: 981142 -> 981894 (+0.08%); split: +0.18%, -0.10%
SMEM: 243315 -> 243454 (+0.06%); split: +0.07%, -0.02%
VClause: 88991 -> 89767 (+0.87%); split: -0.02%, +0.89%
SClause: 200660 -> 200659 (-0.00%); split: -0.00%, +0.00%
Copies: 430729 -> 434160 (+0.80%); split: -0.07%, +0.86%
Branches: 158004 -> 158021 (+0.01%); split: -0.01%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Rhys Perry 12ea0143de radv: fix max_waves estimation on GFX10.3 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>
 2021-01-20 16:46:54 +00:00
Mike Blumenkrantz 924d1ba9eb zink: enable WSI-faking for RADV too 
temporary until we get real WSI support

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8284>
 2021-01-20 16:31:47 +00:00
Mike Blumenkrantz 356a381600 zink: add VK_KHR_driver_properties 
yet another extension that breaks naming conventions for structs/enums,
even if it does so in a very sensible way

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8284>
 2021-01-20 16:31:47 +00:00
Andrii Simiklit e87b59f687 st/mesa: fix pbo upload/download for arrays of textures with only 1 layer 
Having only one layer we can put 0 as third texture coordinate

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4115
Fixes: 36097fc7 ("st/pbo: fix pbo uploads without PIPE_CAP_TGSI_VS_LAYER_VIEWPORT and skip gs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8576>
 2021-01-20 16:02:30 +00:00
Samuel Pitoiset 13f7224dbf ci: exclude one CTS test that timeout most of the time for RADV CI 
dEQP is too slow.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8587>
 2021-01-20 13:27:10 +00:00
Danylo Piliaiev fa74389485 turnip: don't emit tess consts if they are not used 
If tess consts aren't used they don't get included in constlen,
and we risk overrunning consts of the next stage.

Fixes:
 dEQP-VK.tessellation.invariance.outer_edge_index_independence.quads_fractional_even_spacing_ccw
 dEQP-VK.tessellation.invariance.outer_triangle_set.quads_fractional_odd_spacing
 dEQP-VK.tessellation.invariance.primitive_set.isolines_fractional_odd_spacing_ccw
 dEQP-VK.tessellation.invariance.primitive_set.quads_fractional_odd_spacing_cw

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4117

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8578>
 2021-01-20 13:10:10 +00:00
Alejandro Piñeiro 212b1516df v3d/compiler: enable lower_add_sat NIR option 
We are enabling this option for the Vulkan driver, so it makes sense
to enable it for the OpenGL one.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8582>
 2021-01-20 12:41:52 +00:00
Alejandro Piñeiro e333692e9d v3dv/pipeline: enable lower_add_sat NIR option 
We don't support them by hw, so we would need to get them
lowered. This fix some crashes while using renderdoc with UE4 shooter
demo traces.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8582>
 2021-01-20 12:41:52 +00:00
Gert Wollny 3b27243b01 r600: Enable sb also for NIR 
Currently, r600/nir doens't have a proper scheduler or optimizer backend,
to be able to make use of this code path without performance regressions,
we enable the sb optimizer also for NIR.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
 2021-01-20 12:12:07 +00:00
Gert Wollny e20a83eb86 r600/sb: fall back to un-optimized byte code when ra_init fails 
Some emulated fp64 piglit create code that seems to make the register
allocation with sb worse than the original shader created from NIR, so
fall back to using the un-optimized shader.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
 2021-01-20 12:12:07 +00:00
Gert Wollny c1785c55f7 r600/sb: fix boundary assert for mem-instruction decoding 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
 2021-01-20 12:12:07 +00:00
Gert Wollny 14fe19e797 r600/sfn: Keep array registers alive for the whole shader 
This is needed when using sb as a post-optimizer.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
 2021-01-20 12:12:07 +00:00
Gert Wollny 9fa48c0207 r600/sfn: update shader array info 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>
 2021-01-20 12:12:07 +00:00