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Author SHA1 Message Date
Kenneth Graunke 22b511ef02 intel: Set shader_spilling_rate=11 in intel_clc 
A while back Matt enabled shader_spilling_rate by default for anv.
But intel_clc doesn't use the driconf mechanism that we use there.

The GRL shaders spill a lot, and with us now compiling additional
generations of the shaders, Mesa build time is getting prohibitively
expensive.  By setting this, we drop the time taken for a clean debug
build by approximately 35% on my current laptop.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31993>
 2024-11-06 01:57:10 +00:00
Gurchetan Singh a6d4274822 gfxstream: update Kumquat API 
crrev.com/c/5980832 is updating kumquat api .. it's not
distro-packaged and used as a testing tool.  For the
mechanism it is used (GfxstreamEnd2EndTests build target
in AOSP), this API change will not be disruptive.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
 2024-11-05 16:28:56 -08:00
Bo Hu 21a07e850c gfxstream: global_state_wrapped_decoding of vkCreateComputePipelines 
Similar to vkCreateGraphicsPipelines, this
function also need to be wrapped.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
 2024-11-05 16:28:56 -08:00
Serdar Kocdemir e53a2c7474 gfxstream: Allow VK_KHR_line_rasterization 
Allow KHR version of the line_rasterization extension to be
supported from the guest side.

Test: dEQP-VK.dynamic_state.monolithic.line_width.*

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
 2024-11-05 16:28:56 -08:00
Serdar Kocdemir 6912c95efe gfxstream: Keep VK_EXT_line_rasterization for codegen 
Codegen does not automatically generate code for promoted
extensions, so we need to explicitly define support for
VK_EXT_line_rasterization to generate necessary code.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
 2024-11-05 16:28:56 -08:00
sergiuferentz 72dbabdfef gfxstream: VulkanBatchedDescriptorSetUpdate toggled on caps on Guest 
The descriptor set optimization doesn't seem to help performance
during benchmarks and it seems to cause erratic behaviour during normal
operation. This disables it from being on by default.
Can be enabled by -feature VulkanBatchedDescriptorSetUpdate

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31929>
 2024-11-05 16:28:54 -08:00
nyanmisaka e3a0091638 intel/pci_ids: Update DG1 device names 
Ref: https://github.com/intel/compute-runtime/blob/9097b19c3cde67692f75f7d0a2359925646f69d8/shared/source/dll/devices/devices_base.inl#L43-L46
Ref: https://ark.intel.com/content/www/us/en/ark/products/codename/195485/products-formerly-dg1.html
Ref: https://www.intel.com/content/www/us/en/content-details/682687/2020-discrete-gpu-formerly-named-dg1-programmer-s-reference-manual-configurations.html?wapkw=0x4905
Ref: bspec 44463
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
 2024-11-05 22:14:04 +00:00
nyanmisaka b777e433c3 intel/pci_ids: Update TGL device names 
Ref: https://github.com/intel/compute-runtime/blob/9097b19c3cde67692f75f7d0a2359925646f69d8/shared/source/dll/devices/devices_base.inl#L96-L97
Ref: https://www.intel.com/content/www/us/en/products/sku/208659/intel-core-i51140g7-processor-8m-cache-up-to-4-20-ghz-with-ipu/specifications.html?wapkw=0x9a40
Ref: https://www.intel.com/content/www/us/en/products/sku/208660/intel-core-i51145g7-processor-8m-cache-up-to-4-40-ghz-with-ipu/specifications.html?wapkw=0x9a49
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
 2024-11-05 22:14:04 +00:00
nyanmisaka e39deb7700 intel/pci_ids: Update RPL device names 
Ref: https://github.com/intel/compute-runtime/blob/9097b19c3cde67692f75f7d0a2359925646f69d8/shared/source/dll/devices/devices_base.inl#L166-L169
Ref: https://www.intel.com/content/www/us/en/products/sku/232175/intel-core-i71370pe-processor-24m-cache-up-to-4-80-ghz/specifications.html?wapkw=0xa7a0
Ref: https://www.intel.com/content/www/us/en/products/sku/232143/intel-core-i51334u-processor-12m-cache-up-to-4-60-ghz/specifications.html?wapkw=0xa7a1
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
 2024-11-05 22:14:04 +00:00
nyanmisaka eb98962eab intel/pci_ids: Update ADL device names 
Ref: https://github.com/intel/compute-runtime/blob/9097b19c3cde67692f75f7d0a2359925646f69d8/shared/source/dll/devices/devices_base.inl#L154-L156
Ref: https://www.intel.com/content/www/us/en/products/sku/132215/intel-core-i912900hk-processor-24m-cache-up-to-5-00-ghz/specifications.html?wapkw=0x46a6
Ref: https://www.intel.com/content/www/us/en/products/sku/230905/intel-core-i71265ul-processor-12m-cache-up-to-4-80-ghz/specifications.html?wapkw=0x46a8
Ref: https://www.intel.com/content/www/us/en/products/sku/226454/intel-core-i71250u-processor-12m-cache-up-to-4-70-ghz/specifications.html?wapkw=0x46aa
Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30760>
 2024-11-05 22:14:04 +00:00
Georg Lehmann 8104c89174 nir/lower_wpos_ytransform: remove reference to long removed TGSI code 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
 2024-11-05 21:42:37 +00:00
Georg Lehmann e307f40ebe nir/lower_wpos_ytransform: use more typical pass structure 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
 2024-11-05 21:42:37 +00:00
Georg Lehmann a948c9a3eb nir/lower_wpos_ytransform: clean up wpos_adjustment 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
 2024-11-05 21:42:37 +00:00
Georg Lehmann b5d6b31cc5 nir/lower_wpos_ytransform: clean up sample_pos 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
 2024-11-05 21:42:37 +00:00
Georg Lehmann 807b267c4d nir/lower_wpos_ytransform: clean up baryc_at_offset 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
 2024-11-05 21:42:37 +00:00
Georg Lehmann 5d8adf92e7 nir/lower_wpos_ytransform: remove redundant state shader 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
 2024-11-05 21:42:37 +00:00
Georg Lehmann 63f828d262 nir/lower_wpos_ytransform: remove unnecessary state variable 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31951>
 2024-11-05 21:42:37 +00:00
Georg Lehmann 3738c69796 nir/opt_frag_coord_to_pixel_coord: optimize trunc/floor 
Foz-DB Navi21:
Totals from 207 (0.26% of 79206) affected shaders:
MaxWaves: 5924 -> 5980 (+0.95%)
Instrs: 83164 -> 83144 (-0.02%); split: -0.06%, +0.04%
CodeSize: 457296 -> 459092 (+0.39%); split: -0.00%, +0.39%
VGPRs: 5336 -> 5160 (-3.30%)
Latency: 1308811 -> 1307754 (-0.08%); split: -0.16%, +0.08%
InvThroughput: 232768 -> 222979 (-4.21%); split: -4.21%, +0.00%
VClause: 1359 -> 1370 (+0.81%); split: -0.07%, +0.88%
SClause: 3300 -> 3293 (-0.21%); split: -0.24%, +0.03%
Copies: 4992 -> 4985 (-0.14%); split: -0.56%, +0.42%
PreVGPRs: 3757 -> 3619 (-3.67%)
VALU: 58366 -> 58338 (-0.05%); split: -0.08%, +0.03%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31966>
 2024-11-05 21:09:45 +00:00
Eric Engestrom 62011e564c ci/b2c: make dut boot quieter on ci-tron jobs 
!31602 but for b2c jobs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
 2024-11-05 20:30:22 +00:00
Eric Engestrom c8f5477685 ci/b2c: properly escape double-quoted container command 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
 2024-11-05 20:30:22 +00:00
Eric Engestrom b76b53cbbb ci: rename state_x to previous_state_x to be clear about what it contains 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
 2024-11-05 20:30:22 +00:00
Eric Engestrom d69bd58365 ci: consistently restore -x after temporarily disabling it 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
 2024-11-05 20:30:22 +00:00
Eric Engestrom 4a19f7d53d ci: initialize state_x (tracking set -x) 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
 2024-11-05 20:30:21 +00:00
Eric Engestrom 4fa1730cdd ci: only end current section if there is a current section 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31939>
 2024-11-05 20:30:21 +00:00
José Roberto de Souza a991935088 anv: Enable perf metrics id set syncronization 
Now actually making use of new Xe KMD OA syncronization uAPI.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
 2024-11-05 19:25:53 +00:00
José Roberto de Souza 953abc7d1e intel/perf: Add INTEL_PERF_FEATURE_METRIC_SYNC and check if KMD supports it 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
 2024-11-05 19:25:53 +00:00
José Roberto de Souza a38a98c4cb intel/perf: Extend intel_perf_stream_set_metrics_id() to syncronize metrics id changes 
Xe KMD added a uAPI to syncronze metrics id changes, so we can make
it wait for all previous workloads in exec_queue and all previous
metrics id changes to finish before start change it again.
This should make Vulkan queries more robust.

So this makes use of intel_bind_timeline to syncronize the metrics id
changes and xe_queue_get_syncobj_for_idle() to syncronize with
exec_queue.

As i915 and some versions of Xe KMD will not support it, this feature
will only be used then intel_bind_timeline parameter is not NULL and
timeline has a valid syncobj id.
At this patch level all callers will set it to NULL, next patch will
add and initialize timeline in ANV when supported by Xe KMD.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
 2024-11-05 19:25:53 +00:00
José Roberto de Souza 3e6546f662 drm-uapi: Sync xe_drm.h 
Sync with:
commit 086ed1d51544bfc1123b93eccc2ae88e0fbf3d51
Merge: fb6c5b1fdc 53f4b30b05
Author: Dave Airlie <airlied@redhat.com>

    Merge tag 'exynos-drm-next-for-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31283>
 2024-11-05 19:25:53 +00:00
David Rosca 764b316623 radeonsi/vcn: Rework encode padding and session init params 
Move the session init params into common code, instead of having the
same code copied for each VCN version.
Change the padding logic to enforce minimum padding required for input
surface (in case the input surface is smaller than aligned coded size)
and also avoid setting the padding above supported maximum.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31975>
 2024-11-05 18:53:16 +00:00
David Rosca 16281f29fb radeonsi/vcn: Gracefully handle encode errors and report to frontend 
Previously it would show error message and then most likely crash later.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31975>
 2024-11-05 18:53:16 +00:00
David Rosca 41964a5f2b radeonsi/vcn: Don't try to override HEVC SPS conformance window 
No point doing this as the padding is set according to the conformance
window anyway.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31975>
 2024-11-05 18:53:16 +00:00
Pavel Ondračka ef8772e9bf ci: disable ondracka farm 
Its broken at the moment due to ci-tron gateway iPXE issues.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31984>
 2024-11-05 16:00:30 +00:00
Samuel Pitoiset 64774f9c19 radv: cleanup tools related resources when destroying logical device 
This was missing.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31986>
 2024-11-05 15:31:00 +00:00
José Roberto de Souza 27fef94851 intel/perf: Add OA support to ARL 
ARL has enough differences in OA files to have its own set of files.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31685>
 2024-11-05 14:56:49 +00:00
Marek Olšák 5882b5b93b amd/ci: adjust stoney traces checksums 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Marek Olšák 09355290d3 st/mesa: fix incorrect types of shader CSOs 
CSOs are always void *.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Marek Olšák e329d39aa9 gallium: set proper type for pipe_shader_state::ir::nir 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Marek Olšák 9d043e138d nir: add nir_clear_divergence_info, use it in nir_opt_varyings 
nir_opt_varyings computes vertex divergence, which isn't exactly expected
by any other passes.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Marek Olšák b71edce77a nir/lower_io: change INTERP_MODE_NONE to SMOOTH when NONE means SMOOTH 
to improve CSE of load_barycentric_* and IO vectorization.
This is only for load_interpolated_input, which can never be FLAT.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Marek Olšák aee1ebb992 nir: print interp_mode better 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Marek Olšák 2ca56376a4 nir: rename nir_io_glsl_lower_derefs -> nir_io_has_io_intrinsics 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Marek Olšák adc40aee25 glsl: lower IO in the linker if enabled, don't lower it later 
This removes the useless codepath that kept IO derefs until st_finalize_nir.
It was used before nir_opt_varyings existed.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31968>
 2024-11-05 14:13:40 +00:00
Samuel Pitoiset 32a537b25b aco: use inlined constant offsets for storing SGPRs in the trap handler 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31976>
 2024-11-05 11:55:24 +00:00
Constantine Shablia 29db405c16 pan/bi: Lower nir_texop_txd to TEXC in GRDESC_DER mode followed by sampling TEXC 
On v7-, use TEXC(op=GRDESC_DER) to convert user-provided gradient into a
gradient descriptor consumed by the hardware, and then supply that
descriptor to the TEXC instruction.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29521>
 2024-11-05 11:20:21 +00:00
Constantine Shablia 52226d0e3f pan/va: Lower nir_texop_txd to TEX_GRADIENT with derivs followed by TEX_SINGLE 
On v9+, use TEX_GRADIENT to convert user-provided gradient into a
gradient descriptor consumed by the hardware, and then supply that
descriptor to TEX_SINGLE.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29521>
 2024-11-05 11:20:21 +00:00
Boris Brezillon 9199c25e5e pan/bi: Expose the packed TextureOperationDescriptor in bifrost_texture_operation 
Rather than adding memcpy()s to a local u32 variable, add a union
to bifrost_texture_operation so we can directly access the packed
value.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29521>
 2024-11-05 11:20:21 +00:00
David Rosca 93d434362b frontends/va: Move encode fence to coded buffer 
Instead of using the surface fence, store the fence in buffer.
This way the fence won't be overwritten when encoding multiple frames
using the same source surface and SyncBuffer will sync the correct job.
Also fixes possible crash when destroying coded buffer before calling
SyncSurface and possible leak when destroying or reusing coded buffer
with pending encode job without calling SyncSurface/SyncBuffer.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31959>
 2024-11-05 09:42:55 +00:00
Samuel Pitoiset 9bcf17ef5a aco: add support for the trap handler shader on GFX11 
This has been verified on navi31.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
 2024-11-05 07:58:38 +00:00
Samuel Pitoiset 6d5a2ae928 aco: clear the current wave exception in the trap handler 
This is required to re-enable VALU instructions in this wave, only
float exception seem to be affected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
 2024-11-05 07:58:38 +00:00
Samuel Pitoiset e85fc0f869 aco: fix validation for VOP1 instructions without any dest/src 
Like v_clrexcp.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
 2024-11-05 07:58:38 +00:00