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Author SHA1 Message Date
Joshua Ashton 1d9bd8b262 radv: Do early and late tests for fast clears 
We don't know some information regarding DCC image stores and therefore fast clears until we know the surface info.

We should work towards eliminating this, but the cases where this will hit on GFX10_3 is basically 0.

Finally fixes a perf regression in Doom Eternal.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13283>
 2021-10-12 10:59:32 +00:00
Samuel Pitoiset 49c3a88fad radv: implement VK_KHR_format_feature_flags2 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13194>
 2021-10-12 10:20:47 +00:00
Samuel Pitoiset 5dee0d9da9 radv: switch to VK_FORMAT_FEATURE_2_XXX/VkFormatProperties3KHR 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13194>
 2021-10-12 10:20:47 +00:00
Samuel Pitoiset cd4a52b52c radv: remove duplicated code about NGG passthrough determination 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13243>
 2021-10-12 09:09:26 +02:00
Samuel Pitoiset 6bfe65d1dc radv: do not initialize is_ngg_passthrough for geometry shaders 
Geometry shaders can't be NGG passthrough at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13243>
 2021-10-12 09:09:25 +02:00
Samuel Pitoiset b3269444fd aco: cleanup setup_vs_output_info() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13243>
 2021-10-12 09:09:23 +02:00
Samuel Pitoiset 849832bc89 radv: stop gathering output GS info for vertex shaders 
This has no effect.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13243>
 2021-10-12 09:09:21 +02:00
Samuel Pitoiset 595b16013a radv: rename needs_multiview_view_index to uses_view_index 
To avoid confusion with radv_pipeline_key::has_multiview_view_index.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13243>
 2021-10-12 09:09:19 +02:00
Samuel Pitoiset 960d7bf2d3 radv: remove no-op about the view index in the shader info pass 
The view index is always lowered to map the layer ID for fragment
shaders. This was never reached.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13243>
 2021-10-12 09:09:17 +02:00
Samuel Pitoiset 61a3e75242 radv,aco: remove nir_intrinsic_load_layer_id 
This was never used because the layer ID isn't a system value.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13243>
 2021-10-12 09:09:15 +02:00
Bas Nieuwenhuizen ad0bd2a7d2 radv: Handle copying zero queries. 
Looks like this is allowed.

Fixes: 8475a14302 ("radv: Implement pipeline statistics queries.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12907>
 2021-10-11 23:27:45 +00:00
Esme Xuan Lim 1c3ee13a7f docs/panfrost: Fix link to use rst syntax 
Currently the link uses markdown syntax to direct users to IRC, switch
to IRC to render this correctly.

Fixes: e39929663b ("docs/panfrost: Add web chat link")

Signed-Off by: Esme Xuan Lim <esmethedev@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13296>
 2021-10-11 23:03:57 +00:00
Vinson Lee c30fb8ee4d freedreno: Add valgrind dependency. 
Fix a build error.

In file included from ../src/util/u_queue.h:38,
                 from ../src/freedreno/drm/freedreno_ringbuffer.h:33,
                 from ../src/freedreno/ds/fd_pps_driver.h:13,
                 from ../src/freedreno/ds/fd_pps_driver.cc:7:
../src/util/simple_mtx.h:35:12: fatal error: valgrind.h: No such file or directory
   35 | #  include <valgrind.h>
      |            ^~~~~~~~~~~~

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13280>
 2021-10-11 19:20:23 +00:00
Iván Briano 0b75b88651 vulkan: Generate defines for aliases of promoted enums 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13264>
 2021-10-11 18:14:06 +00:00
Iván Briano 1c2cd8bc16 vulkan: fix handling of aliases in enum members 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13264>
 2021-10-11 18:14:06 +00:00
Connor Abbott d4b5d2a020 ir3/ra: Use killed sources in register eviction 
Let's assume we have a vec2 collect instruction with killed sources that
are non-contiguous and the entire rest of the register file is blocked,
which can happen when our register target is very tight. It's impossible
to just insert move instructions to resolve this, but we can make space
by swapping one of the killed sources with the value next to the other,
assuming it's also scalar.

This commit implements that idea, preventing us from falling back to the
terrible shuffle-everything approach in this case.

total instructions in shared programs: 1566648 -> 1565117 (-0.10%)
instructions in affected programs: 13332 -> 11801 (-11.48%)
helped: 30
HURT: 5
helped stats (abs) min: 6 max: 535 x̄: 51.77 x̃: 25
helped stats (rel) min: 2.67% max: 33.63% x̄: 12.28% x̃: 9.58%
HURT stats (abs)   min: 1 max: 6 x̄: 4.40 x̃: 6
HURT stats (rel)   min: 0.18% max: 5.13% x̄: 2.41% x̃: 2.13%
95% mean confidence interval for instructions value: -75.05 -12.43
95% mean confidence interval for instructions %-change: -13.18% -7.18%
Instructions are helped.

total mov in shared programs: 77336 -> 76683 (-0.84%)
mov in affected programs: 2135 -> 1482 (-30.59%)
helped: 29
HURT: 5
helped stats (abs) min: 2 max: 227 x̄: 23.31 x̃: 10
helped stats (rel) min: 6.06% max: 72.73% x̄: 31.83% x̃: 30.00%
HURT stats (abs)   min: 2 max: 9 x̄: 4.60 x̃: 4
HURT stats (rel)   min: 14.29% max: 69.23% x̄: 34.00% x̃: 27.78%
95% mean confidence interval for mov value: -33.21 -5.20
95% mean confidence interval for mov %-change: -32.94% -11.35%
Mov are helped.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13143>
 2021-10-11 16:54:37 +00:00
Connor Abbott 214febdc5d ir3/ra: Don't reset round-robin start for each block 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13143>
 2021-10-11 16:54:37 +00:00
Connor Abbott decbced48f ir3: Initialize local size earlier 
We need the local size in RA for occupancy calculations. Not
initializing these had the unfortunate consequence of
ir3_get_reg_independent_max_waves() returning 0 for compute shaders with
shared variables, disabling the register limiting logic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13143>
 2021-10-11 16:54:37 +00:00
Lionel Landwerlin ce3dd1375f anv: implement VK_KHR_format_feature_flags2 
v2: fix SAMPLED_IMAGE_DEPTH_COMPARISON_BIT_KHR (Ivan)

v3: Fixup VK_FORMAT_FEATURE_2_STORAGE_IMAGE_BIT_KHR setting (Ivan)
    Add missing drm-modifiers/android bits (Lionel)

v4: Avoid duplicating get_ahw_buffer_format_properties() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:29:12 -05:00
Lionel Landwerlin 01d1ec292a anv: start computing KHR_format_features2 flags for storage images 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:29:12 -05:00
Jason Ekstrand c0093c4668 anv: Flip around the way we reason about storage image lowering 
There are roughly two cases when it comes to storage images.  In the
easy case, we have full hardware support and we can just emit a typed
read/write message in the shader and we're done.  In the more complex
cases, we may need to fall back to a typed read with a different format
or even to a raw (SSBO) read.

The hardware has always had basically full support for typed writes all
the way back to Ivy Bridge but typed reads have been harder to come by.
Starting with Skylake, we finally have enough that we at least have a
format of the right bit size but not necessarily the right format so we
can use a typed read but may still have to do an int->unorm or similar
cast in the shader.

Previously, in ANV, we treated lowered images as the default and write-
only as a special case that we can optimize.  This flips everything
around and treats the cases where we don't need to do any lowering as
the default "vanilla" case and treats the lowered case as special.
Importantly, this means that read-write access to surfaces where the
native format handles typed writes now use the same surface state as
write-only access and the only thing that uses the lowered surface state
is access read-write access with a format that doesn't support typed
reads.  This has the added benefit that now, if someone does a read
without specifying a format, we can default to the vanilla surface and
it will work as long as it's a format that supports typed reads.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:29:09 -05:00
Lionel Landwerlin fa251cf111 intel/nir: allow unknown format in lowering of storage images 
We're about to allow unknown format for specific formats in Anv.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:29:09 -05:00
Lionel Landwerlin 0f8efc2b08 anv: switch to use VkFormatFeatureFlags2KHR internally 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:29:09 -05:00
Jason Ekstrand 35315c68a5 anv: Use the common wrapper for GetPhysicalDeviceFormatProperties 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:29:07 -05:00
Jason Ekstrand 1d4d71057b vulkan: Generate #defines with every bit in a given bitfield 
This is useful when trying to restrict from VkFoo2 to VkFoo.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:29:05 -05:00
Jason Ekstrand 2741762ca9 vulkan: Generate flag #defines based on bitwidth 
Instead of basing it on a fixed list, just generate #defines for every
bitfield that's 64-bit.  As part of this refactor, we rework things a
bit to record all bitfields and just not do anything with them if
they're not 64-bit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13198>
 2021-10-11 10:28:58 -05:00
Samuel Pitoiset ced950e42f radv: store the post-processed shader binary config to the cache 
This will allow us to reduce the size of radv_shader_info which is
stored in the cache entry.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12992>
 2021-10-11 12:25:41 +00:00
Samuel Pitoiset 1585629db2 radv: move ac_shader_config to radv_shader_binary instead of legacy 
This will allow us to avoid postprocessing binaries when they are
loaded from the shaders cache.

LLVM binaries already contain the shader config as part of the ELF,
so it's duplicated and increase the cache entry by 48 bytes. Though,
I don't think that should matter for LLVM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12992>
 2021-10-11 12:25:41 +00:00
Joshua Ashton 77e5f149eb ac/surface: Expose modifiers capable of DCC image stores first 
These also have a higher compressed block size.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13056>
 2021-10-11 11:43:39 +00:00
Joshua Ashton f63ec0128c radv: Respect max extent for modifiers 
Some of our modifiers only support upto a certain range, expose this in ImageFormatProperties.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13056>
 2021-10-11 11:43:39 +00:00
Joshua Ashton baff748cb0 radeonsi: Check if modifier supports the image extent 
DCN only supports an extent < 4K on !64B && 128B.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13056>
 2021-10-11 11:43:39 +00:00
Joshua Ashton 9cffe1b9ea ac/surface: Add ac_modifier_max_extent 
Currently, we aren't checking if the modifier supports the extent of the image.

DCN only works with !64B && 128B on extents < 4K.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13056>
 2021-10-11 11:43:39 +00:00
Connor Abbott 0450c1b8a2 tu: Expose VK_KHR_shader_subgroup_extended_types 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13271>
 2021-10-11 11:00:56 +00:00
Connor Abbott bbd8301337 ir3: Skip src size validation for cat1 
They are already handled below, like cat6. The default rules won't work
for the READ_* macros once they have 16-bit sources.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13271>
 2021-10-11 11:00:56 +00:00
Connor Abbott bf0013f3c5 ir3/lower_subgroups: Support 16-bit READ_* sources 
With VK_EXT_shader_subgroup_extended_types these will have 16-bit
sources that need to be expanded to 32-bit (and then narrowed again).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13271>
 2021-10-11 11:00:56 +00:00
Marcin Ślusarz 3b9b6db031 anv: fix potential integer overflow 
Description by Coverity:
"Unintentional integer overflow (OVERFLOW_BEFORE_WIDEN)
overflow_before_widen: Potentially overflowing expression 1 << b with type int
(32 bits, signed) is evaluated using 32-bit arithmetic, and then used in
a context that expects an expression of type VkAccessFlags2KHR (64 bits,
unsigned)"

CID: 1492745
CID: 1492748

Fixes: b996fa8efa ("anv: implement VK_KHR_synchronization2")
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13284>
 2021-10-11 10:30:48 +00:00
Samuel Pitoiset c89616c98d radv: use nir_ssa_undef() for unused image components in meta shaders 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12561>
 2021-10-11 09:47:06 +00:00
Samuel Pitoiset f741c04ed1 radv: use get_global_ids() to compute coordinates in meta shaders 
This was duplicated everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12561>
 2021-10-11 09:47:06 +00:00
Samuel Pitoiset 80df2110b1 radv: remove few useless nir_channels() in meta shaders 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12561>
 2021-10-11 09:47:06 +00:00
Samuel Pitoiset b3af3b1863 radv: remove useless coordinate computation in the compute clear path 
Global Z is always 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12561>
 2021-10-11 09:47:06 +00:00
Samuel Pitoiset ef2e7f7652 radv: use nir_image_deref_{load,store} in the DCC retile compute path 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12561>
 2021-10-11 09:47:06 +00:00
Samuel Pitoiset 6b9e12ea25 radv: advertise VK_KHR_maintenance4 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13193>
 2021-10-11 08:25:46 +00:00
Samuel Pitoiset 19f7a3f01f radv: implement vkGetDeviceImageSparseMemoryRequirementsKHR() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13193>
 2021-10-11 08:25:46 +00:00
Samuel Pitoiset 6061609d0f radv: implement vkGetDeviceImageMemoryRequirementsKHR() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13193>
 2021-10-11 08:25:46 +00:00
Samuel Pitoiset 863fb8852d radv: implement vkGetDeviceBufferMemoryRequirementsKHR() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13193>
 2021-10-11 08:25:46 +00:00
Samuel Pitoiset ea281f5f0a radv: remove radv_pipeline::layout 
From the VK_KHR_maintenance4 spec:
    "Allow the application to destroy their VkPipelineLayout object
     immediately after it was used to create another object. It is no
     longer necessary to keep its handle valid while the created object
     is in use."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13193>
 2021-10-11 08:25:46 +00:00
Marek Olšák 844f66bf38 radeonsi: remove GS fast launch 
It regresses the first snx test because it adds CPU overhead, and there is
no way to work around it. The average effect on viewperf is 0, meaning that
a few cases improve, while a few others regress.

Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13279>
 2021-10-11 07:13:48 +00:00
Dave Airlie 2d15557fd3 crocus/gen5: add dirty flags for urb fences. 
Fixes hang with some gtk4 apps.

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13282>
 2021-10-11 13:33:20 +10:00
Dave Airlie 7079286945 crocus/gen5: reemit shaders on gen5 after new program cache bo. 
This fixes gtk4 programs.

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13281>
 2021-10-11 02:38:36 +00:00
Marek Olšák 86a33569f4 radeonsi: add back a workaround for DCC MSAA on gfx9 due to conformance issues 
Fixes: 8b95f51ef1 - radeonsi: fix and enable full DCC with MSAA 2x on gfx9

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13256>
 2021-10-11 02:10:10 +00:00