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Author SHA1 Message Date
Marek Olšák 165d27abfc winsys/amdgpu: document BO structures 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 68f7e497fe winsys/amdgpu: fix amdgpu_cs_has_user_fence for VPE 
invert the condition to prevent this in the future.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák f5a3874ad1 winsys/amdgpu: clean up the rest of the code for cs->buffer_lists 
This just changes how we iterate over the buffer lists.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák af0d2fe4fc winsys/amdgpu: pass amdgpu_buffer_list* to amdgpu_add_bo_fences_to_dependencies 
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 378984b994 winsys/amdgpu: return amdgpu_cs_buffer* from add/lookup_buffer instead of index 
because we only use the index to get amdgpu_cs_buffer.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 05ba3c9cc5 winsys/amdgpu: clean up duplicated code around amdgpu_lookup/add_buffer 
The function for real, slab, and sparse buffers can be unified, mostly.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 2afe6cea4c winsys/amdgpu: change amdgpu_lookup_buffer to take struct amdgpu_buffer_list 
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 9cf35b601a winsys/amdgpu: change real/slab/sparse_buffers to buffer_lists[3] 
The next commits will simplify it.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 32eb4a54dc winsys/amdgpu: don't count memory usage because it's unused 
Acked-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák bbd64747e2 winsys/amdgpu: move lock from amdgpu_winsys_bo into sparse and real BOs 
The slab BO doesn't use it.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 6803868498 winsys/amdgpu: use inheritance for the slab BO 
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 86481c461e winsys/amdgpu: use inheritance for the sparse BO 
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák e9c416ac9a winsys/amdgpu: use inheritance for the real BO 
add struct amdgpu_bo_real

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák d1e70db89a winsys/amdgpu: use inheritance for the cache_entry BO field 
Add struct amdgpu_bo_real_reusable for it. This is the beginning
of changing amdgpu_winsys_bo to use inheritance instead of a union.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 943a3329c7 winsys/amdgpu: inline amdgpu_add_fence_dependencies_bo_lists 
and rename the other one

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 5cf57986d2 winsys/amdgpu: cosmetic changes in amdgpu_cs_add_buffer 
Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák c902b9e1d9 winsys/amdgpu: don't return a value from cs_add_buffer 
It's unused. The return value is only used with the radeon winsys.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 390f26eefb ac,radeonsi: require DRM 3.27+ (kernel 4.20+) same as RADV 
The only major change is the code removal of the legacy BO list path
in the winsys, which required switching "debug_all_bos" to the new path.

Reviewed-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Marek Olšák 5cfd659276 ac/llvm: remove code for converting txd from 1D to 2D because NIR does it 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26547>
 2023-12-13 16:26:17 +00:00
Caio Oliveira f17e23e116 compiler/glsl: Reduce scope of is_anonymous 
This a GLSL parser specific detail, so move it there.  Also
add a comment pointing to where #anon prefix is used.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26656>
 2023-12-13 15:44:40 +00:00
Ganesh Belgur Ramachandra 8458cd49e0 asahi: fixes prevailing '-Werror=maybe-uninitialized' issue 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26206>
 2023-12-13 15:29:43 +00:00
Sathishkumar S cd8ccba814 frontends/va: use va interface for jpeg partial decode 
add support to check jpeg crop decode cap and to set the crop
rectangle. the interface is avialble on libva 1.21.0 and higher.

v2: (Ruijing)
enclose the entire case block within VA_CHECK_VERSION
if attr unsupported set the return value to VA_ATTRIB_NOT_SUPPORTED

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26588>
 2023-12-13 14:18:05 +00:00
Christian Gmeiner 2f205caea4 etnaviv: Add static_assert(..) to catch memory corruption 
When we start to support GPUs with more then 16 varyings the code base
tells us that there is some work to do.

Cc: mesa-stable

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26662>
 2023-12-13 12:56:47 +00:00
Christian Gmeiner 11ffb20b70 etnaviv: Update headers from rnndb 
Update to rnndb commit 071f5a60dcb8.

This updates VIVS_PA_SHADER_ATTRIBUTES__LEN define from 10 to 16 and
fixes memory corruption if more then 10 varyings are used. The current
upper limit for varyings is 16.

Cc: mesa-stable

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26662>
 2023-12-13 12:56:47 +00:00
Karol Herbst de3190d36d radeonsi: fix reg_saved_mask for non graphics contexts 
The old code used to clear the bits, the new one set it. It should have
used `BITSET_CLEAR_RANGE` instead.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10286
Fixes: 17e01a9a9b ("radeonsi: merge context_reg_saved_mask and other_reg_saved_mask into a BITSET")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26657>
 2023-12-13 12:25:38 +00:00
Tatsuyuki Ishi c3c3a8926a radv/amdgpu: Separate the concept of residency from use_global_list. 
A BO can be always resident by two ways:
1. Through kernel bookkeeping. The BO is created with
   AMDGPU_GEM_CREATE_VM_ALWAYS_VALID and bo->is_local gets set to true.
2. Through the driver global BO list. On every submission, the global
   BO list is added to the CS's BO list.

Until now, use_global_list reflected either 1. or 2. . This commit
changes it to reflect 2. only, and update callsites that checks for
residency to use a new helper.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26591>
 2023-12-13 12:03:20 +00:00
Tatsuyuki Ishi 63120a55b8 radv/amdgpu: Remove virtual bo dump logic. 
Virtual BOs cannot go into the global bo list. Accessing bo_handle is
also invalid for virtual BOs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26592>
 2023-12-13 11:42:35 +00:00
Rohan Garg 40c6e54ce7 anv: rename anv_create_companion_rcs_command_buffer to anv_cmd_buffer_ensure_rcs_companion 
We can now drop any checks for companion_rcs_cmd_buffer before calling
anv_create_companion_rcs_command_buffer.

Ensure that anv_cmd_buffer_ensure_rcs_companion callee's have the proper
error handling.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26648>
 2023-12-13 11:19:07 +00:00
Timothy Arceri bed1b8b90d radeonsi: fix divide by zero in si_get_small_prim_cull_info() 
This fixes a crash on startup with the game
"Ty the Tasmanian Tiger 3"

Fixes: f8a0aa6852 ("radeonsi: fix view culling for wide lines")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26661>
 2023-12-13 10:06:41 +00:00
Lionel Landwerlin d376d8c5ea anv: promote EXT_calibrated_timestamps to KHR 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26632>
 2023-12-13 09:39:08 +00:00
Lionel Landwerlin 4eb1eb0db1 anv: promote EXT_vertex_attribute_divisor to KHR 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26632>
 2023-12-13 09:39:08 +00:00
Lionel Landwerlin f99e43d606 anv: switch to use runtime physical device properties infrastructure 
Prevents us to have that big switch case for each extension's
properties.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26632>
 2023-12-13 09:39:08 +00:00
Lionel Landwerlin dc858202a9 anv: get features after initializing drm 
We'll want to capture properties like features, just once at
initialization.

In order to do this we need the DRM stuff to be initialized as some of
that can be reported in properties.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26632>
 2023-12-13 09:39:08 +00:00
Lionel Landwerlin a1dcf943ab isl: constify isl_device_get_sample_counts() 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26632>
 2023-12-13 09:39:08 +00:00
Tapani Pälli 2336058bbb iris: use slow clear for small surfaces with Wa_18020603990 
Described in Wa_18020603990, we need to use slow clear or add an
partial resolve after fast clear for surfaces where bpp <= 32 and
dim <= 256x256.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26629>
 2023-12-13 09:12:19 +00:00
Tapani Pälli 25a32433b1 anv: use slow clear for small surfaces with Wa_18020603990 
Described in Wa_18020603990, we need to use slow clear or add an
partial resolve after fast clear for surfaces where bpp <= 32 and
dim <= 256x256.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26629>
 2023-12-13 09:12:19 +00:00
Samuel Pitoiset ca8d9f850b radv/ci: remove dEQP-VK.mesh_shader.ext.query.* from the lists 
meshShaderQueries has been recently disabled because it causes random
GPU hangs in CI, I'm still investigating it. But let's clean the CI
lists to avoid any confusion, I will re-introduce them if needed but
this issue can also be reproduced without mesh shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26651>
 2023-12-13 08:33:24 +00:00
Samuel Pitoiset f576ce3340 radv: advertise VK_KHR_vertex_attribute_divisor 
This is a promotion from the EXT, except the new property
supportsNonZeroFirstInstance which should already be supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26595>
 2023-12-13 08:08:21 +00:00
Samuel Pitoiset 24c755316b vulkan/runtime: promote VK_EXT_vertex_attribute_divisor to KHR 
Just rename existing structs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26595>
 2023-12-13 08:08:21 +00:00
Samuel Pitoiset 0605631094 radv: stop clearing FMASK_COMPRESS_1FRAG_ONLY for TC-compat CMASK images 
TC-compat CMASK means Fmask decompression isn't needed because the hw
can read it directly from shaders, so this shouldn't have any effects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26575>
 2023-12-13 07:48:51 +00:00
Samuel Pitoiset c70c269b16 radv: remove useless check for TC-compat CMASK images during fb emission 
The FMASK decompression only happens for images with FMASK and without
TC-compat CMASK, so both can never be TRUE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26575>
 2023-12-13 07:48:51 +00:00
Iago Toral Quiroga 205938cd39 v3dv: disallow image stores on VK_KHR_DISPLAY surfaces 
Display surfaces must be linear and V3D can only do linear TMU access
for 1D images. This would also restrict sampling usages, however, we
can currently work around those in the driver at a performance penalty.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10268
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26647>
 2023-12-13 06:17:15 +00:00
Faith Ekstrand f6437f4388 nvk: Implement VK_EXT_multi_draw 
Zink uses this to let it skip a bunch of the per-draw validation and, in
the case of NVK, redundant root descriptor uploads.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9642
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26660>
 2023-12-13 03:18:04 +00:00
Thomas H.P. Andersen afbaeee358 nvk: VK_EXT_color_write_enable 
A write mask based on the pipeline creation input is stored in scratch. Another
similar mask is also stored for the dynamic color_write_enable. These can then
be updated individually, and will be combined in MME macro before use.

Each attachment has a mask for rgba. The max number of attachments in 8 so
we can fit the write mask in a single 32bit scratch.

color_write_enable is a single bit per attachment. To make it easier to combine
in with the write mask it is stored in scratch with a separate rgba bits.

The layout of the both scratch values are:
Attachment index 88887777666655554444333322221111
Component        abgrabgrabgrabgrabgrabgrabgrabgr

dEQP-VK.pipeline.monolithic.color_write_enable.*

Test run totals:
  Passed:        576/576 (100.0%)
  Failed:        0/576 (0.0%)
  Not supported: 0/576 (0.0%)
  Warnings:      0/576 (0.0%)
  Waived:        0/576 (0.0%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26211>
 2023-12-13 00:48:54 +00:00
Alyssa Rosenzweig f217d267d3 gallium: add PIPE_IMAGE_ACCESS_DRIVER_INTERNAL 
for e.g. driver internal blits that can use special paths wrt comporession.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26613>
 2023-12-12 19:44:41 -04:00
Alyssa Rosenzweig 15b5437f8f gallium: fix util_clamp_color type confusion 
fixes arb_color_buffer_float-clear GL_RGBA8_SNORM.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26613>
 2023-12-12 19:44:35 -04:00
Karol Herbst d136583c82 rusticl/kernel: explicitly set rounding modes 
Since dbbf566588 ("aco,ac/llvm,radeonsi: lower f2f16 to f2f16_rtz in nir")
radeonsi behavior changed and some of the core fp16 ops broke as a result.

We should explicitly specify the rounding mode until we add an gallium API
for drivers to advertize what they prefer.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26655>
 2023-12-12 23:02:11 +00:00
David Heidelberg 53b01459fd rusticl: add freedreno alias for RUSTICL_ENABLE 
`RUSTICL_ENABLE=msm` isn't first thought usually,
let's support the `freedreno` alias.

Suggested-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26642>
 2023-12-12 21:56:59 +00:00
Friedrich Vock f1817ab7e0 radv,vtn,driconf: Add and use radv_rt_ssbo_non_uniform workaround for Crysis 2/3 Remastered 
Crysis 2 and 3 Remastered's RT shaders non-uniformly index into SSBO
descriptor arrays without specifying the NonUniformEXT qualifier on the
relevant access chains/load ops. This leads to artifacts around objects.

To add insult to injury, the game fails to provide a meaningful
applicationName/engineName in the Vulkan part of the DX11-Vulkan interop
solution used for RT. Both of these fields are set to "nvpro-sample"
(perhaps the code has been copied from NVIDIA's sample applications).
Therefore, fall back to executable name matching.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9883
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26391>
 2023-12-12 21:16:39 +00:00
Faith Ekstrand 63e2bba592 nak: Don't set both FTZ and DNZ at the same time 
Fixes: 3955e596df ("nak: Implement fmulz and ffmaz")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26654>
 2023-12-12 20:29:53 +00:00