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Author SHA1 Message Date
Samuel Pitoiset 0fa43b5bfb radv: use radv_fill_memory() in the accel struct path 
It's now possible to remove the NULL BO check.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34556>
 2025-04-17 08:59:58 +00:00
Tapani Pälli 6d70ec449f iris: make sure to not mix compressed vs non-compressed 
This commit implements the following requirement:

   "Keep any UMD-recycling of compression-enabled/disabled
    memory separate."

As additional info there are 2 related wa's for the issue:

   Wa_14018443005
   Wa_18038669374

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34499>
 2025-04-17 06:17:53 +00:00
Tapani Pälli c2a4657862 iris: force reallocate on eglCreateImage with GFX >= 20 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34499>
 2025-04-17 06:17:53 +00:00
Tomeu Vizoso aa73767f5e etnaviv/ml: Support per-channel quantized weights 
Dequantize the weights, calculate new quantization values based on the
minimum and maximum values and requantize again.

This causes a loss of accuracy when compared to proper per-axis
quantization as we don't have the original data from training any more.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34497>
 2025-04-17 05:25:49 +00:00
Philipp Zabel ce9030740a teflon: Allow per-axis quantization 
Allow per-axis quantization in the output channel dimension.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34497>
 2025-04-17 05:25:49 +00:00
Tomeu Vizoso 7dfcca9007 etnaviv/ml: Fix zero point values for signedness 
Take into account the signedness for FullyConnected.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34497>
 2025-04-17 05:25:49 +00:00
Tomeu Vizoso d88f0b8f3c etnaviv/ml: Reorder dimensions in convolutions 
The blob does this, and doesn't seem to just be for performance as I see
some tests being fixed by it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34497>
 2025-04-17 05:25:49 +00:00
Thomas H.P. Andersen d55a69e769 nak: make is_fneg_zero detect -rZ 
fold_imm starts with this check:
        let SrcRef::Imm32(mut u) = self.src_ref else {
            return *self;
        };

For -rZ we thus return early and the matching in is_fneg_zero does not
find it. This MR adds a match for SrcRef::Zero + SrcMod::FNeg.

This lets copy propagation fold this:

r3  = shfl.bfly r2 0x2 0x1c03
r3  = fswzadd.ftz r3 r2 [sub, sub, subr, subr]
r3  = fadd.ftz -rZ |r3|
r16 = shfl.bfly r2 0x1 0x1c03
r16 = fswzadd.ftz r16 r2 [sub, subr, sub, subr]
r16 = fadd.ftz -rZ |r16|
r3  = fadd.ftz r16 r3

into:

r3  = shfl.bfly r2 0x2 0x1c03
r3  = fswzadd.ftz r3 r2 [sub, sub, subr, subr]
r16 = shfl.bfly r2 0x1 0x1c03
r16 = fswzadd.ftz r16 r2 [sub, subr, sub, subr]
r3  = fadd.ftz |r16| |r3|

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12480
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33107>
 2025-04-17 02:22:02 +00:00
Faith Ekstrand 47fc468944 nak/sm70: Fix the bit74_75_ar_mod assert 
It's used for src2, not src0.

Fixes: 40422927dc ("nak: Pass has_mod to all form of src2 requiring it")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33107>
 2025-04-17 02:22:02 +00:00
Faith Ekstrand 328112c6bc nak/legalize: Take a RegFile in copy_alu_src_and_lower_ineg() 
Fixes: af6093a712 ("nak/legalize: Add a helper for lowering ineg")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33107>
 2025-04-17 02:22:02 +00:00
Faith Ekstrand 22a30bfa4f nak/legalize: Take a RegFile in copy_alu_src_and_lower_fmod 
Otherwise, we'll screw up uniform GPRs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33107>
 2025-04-17 02:22:02 +00:00
Eric Engestrom 269b09c449 docs: add sha sum for 25.0.4 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34564>
 2025-04-17 02:22:24 +02:00
Eric Engestrom 71c1acfaf2 docs: add release notes for 25.0.4 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34564>
 2025-04-17 02:22:24 +02:00
Eric Engestrom f74a585dbb docs: update calendar for 25.0.4 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34564>
 2025-04-17 02:22:23 +02:00
Caio Oliveira d5ad798140 spirv, radv, intel: Add NIR intrinsic for cmat conversion 
A cooperative matrix conversion operation was represented in NIR by the
cmat_unary_op intrinsic with an nir_alu_op as extra parameter,
that was already lowered to a specific conversion operation
based on the matrix types.

Instead of that, add a new intrinsic `cmat_convert` that is specific
for that conversion.  In addition to the src/dst matrix descriptions
already available, also include the signedness information in the
intrinsic (reuse nir_cmat_signed for that).  This is needed because
different Convert operations define different interpretations for
integers, regardless their original type.

In this patch, both radv and intel were changed to use the same logic
that was previously used to pick the lowered ALU op.

This change will help represent cmat conversions involving BFloat16,
because it avoids having to create new NIR ALU ops for all the
combinations involving BFloat16.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34511>
 2025-04-16 23:13:36 +00:00
Valentine Burley 2f02fa5db4 intel/ci: Start using the new 6.14 kernel on JSL 
The new 6.14 kernel in gfx-ci linux is now stable on Jasper Lake, so drop
the kernel override from the anv-jsl-vk job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34553>
 2025-04-16 22:13:19 +00:00
Valentine Burley da71656dd9 ci/lava: Merge and deduplicate log sections 
Drop the duplicated rootfs preparation sections, and combine the
TEST_SUITE and TEST_DUT_SUITE sections.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34523>
 2025-04-16 21:34:35 +00:00
Valentine Burley 70b033d2ad ci/lava: Don't include the timeout in the log sections 
Reduces visual clutter in the job logs.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34523>
 2025-04-16 21:34:35 +00:00
Valentine Burley f7224dd159 ci/lava: Collapse more log sections 
These sections were not collapsed, causing the setup sections to clutter
the job logs.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34523>
 2025-04-16 21:34:35 +00:00
Patrick Lerda 60a31156b0 mesa_interface: fix legacy dri2 compatibility 
These values are shared with xcb/dri2.h, and can't be changed
without breaking the legacy dri2 compatibility. This change
reverses partially the update done by 3b603d1646.

For instance this issue is triggered on dri2 i915 with
"piglit/bin/glx-copy-sub-buffer -auto" or
"piglit/bin/hiz-depth-read-window-stencil0 -auto".

Fixes: 3b603d1646 ("mesa_interface: remove unused stuff")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34561>
 2025-04-16 20:19:14 +00:00
Mike Blumenkrantz de6efc01c1 zink: verify that surface exists when adding implicit feedback loop 
this can be null if multiple contexts are in use

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34557>
 2025-04-16 18:26:32 +00:00
Tomeu Vizoso 251d1e2551 etnaviv/ml: Use etna_buffer_resource instead of etna_resource 
Otherwise we hit an assert in newly added code.

Fixes: d738b3ea2b ("etnaviv: split PIPE_BUFFER resources from other types of resources")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Tomeu Vizoso 1f5bc6ddbf etnaviv/tests: Add comment on why the SSDLite MobileDet test fails 
So we don't waste time debugging it again.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Tomeu Vizoso 0213eef3b3 teflon/tests: Dump output buffers to disk 
It can be convenient to compare the outputs from the CPU, proprietary
driver and Mesa to check for convergence.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Tomeu Vizoso 80e09e9b1f teflon/tests: Divide the tolerance level by a constant 
A final tolerance of 0.6 seems to be about right for big models with
per-channel quantization.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Tomeu Vizoso 15a8c49ad5 teflon/tests: Print shorter negative INT8s 
As we know that only the last 8 bits are relevant.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Tomeu Vizoso 554fb8af11 teflon/tests: Take into account signedness when checking the output tensors 
Otherwise, it won't be able to apply the tolerance in all cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Tomeu Vizoso b3746305ea teflon/tests: Test all models in /models 
It was becoming quite tedious to add models to testing.

This will also make it easier to locally test with non-redistributable
models.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Tomeu Vizoso 68200ac961 teflon/tests: Use a single tolerance value 
We have improved our accuracy and can use just a tolerance of 2 for all
the tests we currently have.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34481>
 2025-04-16 17:53:39 +00:00
Jesse Natalie 7ca4e4d34b microsoft/compiler: Force load_output => undef in tess_ctrl main func 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34541>
 2025-04-16 16:02:07 +00:00
José Roberto de Souza ab591dc642 iris: Fix IRIS_HEAP_SYSTEM_MEMORY_CACHED_COHERENT slab parent allocation 
It was using the same switch case from IRIS_HEAP_SYSTEM_MEMORY_UNCACHED
allocating both as uncached.

Cc: stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34533>
 2025-04-16 15:43:15 +00:00
Alyssa Rosenzweig 9b55451ea7 hk: fix underbinding scratch 
need to round up to page size (minimally) or we assert out. hit in vulkaninfo
of all things.

Fixes: 678134add5 ("hk: implement sparse")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34526>
 2025-04-16 15:24:37 +00:00
Eric Engestrom dbe6c39270 docs: update calendar for 25.1.0-rc1 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34555>
 2025-04-16 15:11:40 +00:00
Mike Blumenkrantz 5844dea316 delete clover 
there comes a time when a project has to be declared unfit to remain
in the tree

this frontend hasn't seen actual development in about 6 years

if someone has a pressing need to continue development, there's no
blocker to un-deleting it, but unless that happens, there's now a
more featureful, more conformant, more active CL frontend in the tree

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19385>
 2025-04-16 10:01:44 -04:00
Pierre-Eric Pelloux-Prayer 555821ff93 winsys/amdgpu: disable VM_ALWAYS_VALID 
The referenced commit has been identified as the root cause of
graphic artifacts / hangs on some APUs.

For now disable AMDGPU_GEM_CREATE_VM_ALWAYS_VALID on all chips
except when user queues are used.

See https://gitlab.freedesktop.org/mesa/mesa/-/issues/12809.

Fixes: 8c91624614 ("winsys/amdgpu: use VM_ALWAYS_VALID for all VRAM and GTT allocations")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34547>
 2025-04-16 13:22:16 +00:00
Eric Engestrom 3f7345a0ce docs: reset new_features.txt 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34552>
 2025-04-16 14:30:26 +02:00
Eric Engestrom b8968276e6 VERSION: bump to 25.2 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34552>
 2025-04-16 14:30:14 +02:00
Mark Collins 93547d45ce ir3/a7xx: Add post-RA pass to track liveness and insert (last) 
Introduces a backwards dataflow analysis pass to determine when a
certain register is always written to prior to being read in a
similar manner to SSA liveness but performed after RA which we can
use to determine when we can insert (last) on src regs on A7XX.

Passing VK-CTS: dEQP-VK.pipeline.*

Signed-off-by: Mark Collins <mark@igalia.com>
Co-Authored-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25077>
 2025-04-16 07:40:50 +00:00
David Rosca 6586689661 radeonsi/vpe: Use studio range for YUV and full for RGB by default 
If application doesn't specify color range, use studio for YUV and
full for RGB.
Also stop always forcing full for RGB as that's wrong.

Reviewed-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34519>
 2025-04-16 07:17:57 +00:00
David Rosca 1a502fcd89 radeonsi/vpe: Fix process_frame return value 
VPE_STATUS_OK is 1, but the function should return 0 on success.

Fixes: 4fe586f71e ("radeonsi/vpe: support geometric scaling")
Reviewed-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34519>
 2025-04-16 07:17:56 +00:00
David Rosca bd6f9e8aee radeonsi/vpe: Use float division to get scaling ratio 
Fixes: e85a6b6a63 ("radeonsi/vpe: check reduction ratio")
Reviewed-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34519>
 2025-04-16 07:17:56 +00:00
Samuel Pitoiset b4940255ed radv/sdma: add support for compression on GFX12 
Similar to previous generations that support compression, except that
the driver don't need to configure a meta VA because DCC is completely
transparent to the userspace.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34517>
 2025-04-16 06:57:00 +00:00
Samuel Pitoiset efa0b16bb2 radv/sdma: add a new flag to know if the surface is compressed 
On GFX12, DCC is transparent to the driver and there is no meta VA.
Adding a new flag to know if the SDMA surface is compressed is needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34517>
 2025-04-16 06:57:00 +00:00
Samuel Pitoiset 03671ccf9e radv/sdma: use the correct helper to get the number type field 
This wasn't technically incorrect because V_028C70_BU_NUM_xxx values
are similar to V_028C70_NUMBER_xxx but it's better to use the corect
helper.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34517>
 2025-04-16 06:57:00 +00:00
Samuel Pitoiset b44dc98cde radv/sdma: remove redundant check for compression when getting metadata 
It's already checked by the caller.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34517>
 2025-04-16 06:57:00 +00:00
Samuel Pitoiset d3d5d2fe86 radv/sdma: use SDMA5_DCC_xxx bitfields 
It's cleaner.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34517>
 2025-04-16 06:57:00 +00:00
Samuel Pitoiset f44342199a radv/sdma: simplify configuring the number of uncompressed DCC blocks 
SDMA doesn't support MSAA, so the value can be
V_028C78_MAX_BLOCK_SIZE_256B.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34517>
 2025-04-16 06:57:00 +00:00
Samuel Pitoiset 13db408e59 ac/perfcounter: add support for GFX12 
Sourced from PAL to add SPM support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34524>
 2025-04-16 06:35:33 +00:00
Samuel Pitoiset c42d43e8eb radv: print more error messages during SPM initialization 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34524>
 2025-04-16 06:35:33 +00:00
Marek Olšák 177427877b radeonsi: use nir_opt_shrink_vectors 
It reduces VGPR usage, but the impact is almost none.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34432>
 2025-04-16 06:08:48 +00:00