0f58e8dabe
agx: Add dead code eliminator
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:16 -04:00
28801b4849
agx: Add forward optimizing pass for fmov
...
Explain the ideas behind our SSA-based optimizer (inspired by ACO's,
thank you to Daniel Schuermann for discussing this with me in the
context of Bifrost), and implement the subset needed to propagate
abs/neg through.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:16 -04:00
e50bae00f4
agx: Add 32-bit bitwise shifts
...
Only ishr has an actual native instruction, the others are special cases
of the bitfield insertion/extraction ops.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:16 -04:00
17bb5a067a
agx: Add saturated integer add/subtract support
...
Just a flag on the regular iadd instruction.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:15 -04:00
86ae965ea4
agx: Add iadd/imad integer arithmetic
...
Lots of optimizations will be possible later on.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:15 -04:00
0c21513693
agx: Add bitwise operations
...
This get translated to bitop with the corresponding truth table with
some builder syntax sugar.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:15 -04:00
c06dcaf0a0
agx: Implement native int->float conversions
...
This time 8, 16, and 32-bit sources are supported natively, but not
64-bit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:15 -04:00
2126848771
agx: Implement native float->int conversions
...
No 8-bit or 64-bit yet since those need lowerings.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:14 -04:00
8191adb0d9
agx: Add minifloat tests
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:14 -04:00
c89ab07996
agx: Add 8-bit AGX minifloat routines
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:14 -04:00
1f77aa95ec
agx: Implement fsin/fcos
...
First, we lower to fsin_agx and some ALU in NIR. Then, we implement
fsin_agx with the underlying transcental ops.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:14 -04:00
b5a3845f9a
agx: Implement simple floating point ops
...
These are all direct translations of NIR->AIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:14 -04:00
8648b2be0b
agx: Implement ld_vary
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:13 -04:00
e54fdc0fac
agx: Terminate programs with stop and traps
...
The function of stop is clear. The function of trap, let alone a whole
sled of them, is less so. Maybe a debugging feature for later.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:13 -04:00
5b34cc40ca
agx: Add st_vary(_final) instruction packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:13 -04:00
7832945747
agx: Add packing for memory loads/stores
...
Encoding is dramatically different from ALU.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:13 -04:00
f2d264e191
agx: Add instruction packing
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:13 -04:00
c215895eae
agx: Add a trivial register allocator
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:12 -04:00
583684b5a7
agx: Add instruction printing
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:12 -04:00
8af9822d14
agx: Implement fragment_out
...
For a single colour render target.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:12 -04:00
0079783428
agx: Implement vec2/vec3/vec4 ops
...
As p_combine, to un-stub emit_alu.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:12 -04:00
7ad11e3923
agx: Add agx_alu_src_index helper for emit_alu
...
Since we don't use abs/neg in NIR, this just needs to construct
p_extract ops to deal with swizzles.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:12 -04:00
22886f50f9
agx: Implement direct st_vary
...
Indirection can come later, if at all..
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:11 -04:00
fde66f0aa8
agx: Implement load_const as mov
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:11 -04:00
2bfe1a61c5
agx: Stub emit_intrinsic
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:11 -04:00
075e6be90c
agx: Stub NIR instruction iteration
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:11 -04:00
186c56a2d4
agx: Stub control flow walking
...
From Bifrost. We'll need to diverge (no pun intended) due to exec_mask
handling specific to Apple.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:10 -04:00
8b8c1a2827
agx: Remap varyings to match AGX ABI
...
It's not clear if this is software or hardware defined, but until we
know more about linkage, let's match the blob. Fixes dEQP issues with
gl_PointSize.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:10 -04:00
2470a080d2
agx: Stub NIR backend compiler
...
A fork of the Bifrost compiler, tailored to AGX. nir_register support is
removed, as I want to use an SSA-based allocator for AGX. (There are no
VLIW-like requirements and extremely limited vector semantics, so we can
use an ACO approach with ease.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:10 -04:00
719bf5152f
agx: Generate builder routines
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:10 -04:00
07f87500e3
agx: Generate runtime-accessible opcode table
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:10 -04:00
c9fe9ce998
agx: Generate opcode list
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:09 -04:00
50b5c94885
agx: Add opcode descriptions as Python
...
Pattern lifted from NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:09 -04:00
972409dacb
asahi: Stub command-line compiler for AGX G13B
...
Based on the Bifrost standalone compiler, which was based on Midgard's
standalone compiler, which was based on Freedreno's standalone compiler,
which was.....
It's like sour dough!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:09 -04:00
0ea67e57e5
nir: Add fsin_agx opcode
...
Used to split up the fsin/fcos lowering for AGX between NIR and the
backend, to permit algebraic optimizations without polluting NIR with
too many hardware details. The backend NIR lowering produces an
fmul/ffma of the input so we can optimize code like sin(2*x).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582 >
2021-05-02 17:41:09 -04:00
e07a2a0f18
util/bitset: Add BITSET_COUNT helper
...
Expressible as a prefix sum but that's a bit unnatural, so add a
convenience helper.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Mike Blumenkrants <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10581 >
2021-05-02 20:38:28 +00:00
231651fd89
anv: implement VK_KHR_fragment_shading_rate
...
Available on Gen11+.
v2: Order shading rate in correct order (Samuel)
v3: Move CPS_STATE emission to genX_state.c
v4: Don't override various output structures (Jason)
v5: Rebase on top master (Lionel)
v6: Fix invalid VkPhysicalDeviceFragmentShadingRatePropertiesKHR
(min|max)FragmentShadingRateAttachmentTexelSize values (Ken)
Drop #endif comment
v7: Limit extension to Gfx11+ (Lionel)
Support conservative raster (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
34c560ae95
intel/fs: Stop using brw_dp_read/write_desc in Gen7+ only code
...
Those helpers exist primarily to sort out some of the weirdness around
Gen4-6 dataport access. On Gen5 and earlier, everything was called
"dataport" and, instead of the SFID we have today there was a "target
cache" parameter in the descriptor. There are also some bits that moved
around on various gens depending on read vs. write. Starting with Gen6,
most things which target one of the data cache SFIDs should use
brw_dp_desc() instead.
v2: Drop backward comment (Ken)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
2e7656ae2f
intel/eu: SVB writes only happen on Gen6
...
It's a Gen6 XFB thing. It's never used for anything else so there's no
point in having a target cache switch.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
0421690f83
intel/compiler: add restrictions related to coarse pixel shading
...
v2: Update to BITSET_TEST()
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
81f369c93b
intel/compiler: add coarse pixel offset on Gfx12.5+
...
Gfx12.5 has a slightly different code path.
v2: Document the oddness
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
6d4070f3dd
intel/compiler: add support for fragment coordinate with coarse pixels
...
v2: Drop new internal opcodes (Jason)
Simplify code (Jason)
v3: Add Z computation for coarse pixels
v4: Document things a little
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
a297061524
intel/compiler: add support for fragment shading rate variable
...
v2: Drop old register type initializers (Jason)
Simplify instruction snippet (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
b6332fc4a8
intel/compiler: handle coarse pixel in render target writes descriptors
...
v2: Use the new inst->ex_desc field (Jason)
v3: Drop CPS LoD compensation from sampler messages (Lionel)
v4: Drop useless uses_rate_shading (Ken)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
d665c2dcf0
intel/compiler: use existing helpers to pull bits of descriptors
...
v2: Use new RT descriptor helper
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
64551610d1
intel/compiler: rework message descriptors for render targets
...
Render target message descriptors are slightly different from the
dataport ones. In particular the msg_type field is on bits 14:17 for
RT while bits 14:18 for DP.
v2: Drop unused send_commit_msg field in brw_fb_write_desc() (Ken)
v3: Rebase on top renaming (Lionel)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Suggested-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
dabaaaf6c7
intel/compiler: make sure we keep the lowest dispatch limit
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
4dcfb18a82
intel/decoder: decode CPS_STATE
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
b1622af394
intel/genxml: Add coarse pixel shading instructions
...
v2: Add Gen12.5
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
bbfc959d03
intel/dev: printout correct subslice/dualsubslice name
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7455 >
2021-05-02 20:20:06 +00:00
Alyssa Rosenzweig