Simon Perretta
c3325b22d8
pco: image atomics support
...
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36412 >
2025-09-16 18:26:12 +00:00
Lionel Landwerlin
afea98593e
nir: add a new intrinsic for load dynamic tessellation config
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34872 >
2025-09-05 07:46:15 +00:00
Rhys Perry
2d0f93631c
nir/divergence: make smem load_global_amd uniform
...
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37101 >
2025-08-30 14:55:13 -04:00
Dave Airlie
c38170452d
nir: add nir_intrinsic_cmat_load_shared_nv
...
This maps to NAK's OpLdsm
Reviewed-by: Mary Guillemard <mary@mary.zone >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36363 >
2025-08-28 16:09:07 +02:00
Marek Olšák
3aadae22ad
nir: make nir_block::predecessors & dom_frontier sets non-malloc'd
...
We can just place the set structures inside nir_block.
This reduces the number of ralloc calls by 6.7% when compiling Heaven
shaders with radeonsi+ACO using a release build (i.e. not including
nir_validate set allocations, which are also removed).
Reviewed-by: Gert Wollny <gert.wollny@collabora.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36728 >
2025-08-21 06:13:48 +00:00
Georg Lehmann
2d16f457c5
nir: add ACCESS_SKIP_HELPERS
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36610 >
2025-08-12 08:56:37 +00:00
John Anthony
000bd3046d
nir,spirv: Add support for SPV_ARM_core_builtins
...
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36019 >
2025-08-07 11:46:33 +02:00
John Anthony
a68a825aad
nir,agx: unvendor core_id_agx
...
core_id will be used by SPV_ARM_core_builtins
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36019 >
2025-08-07 11:46:33 +02:00
Qiang Yu
4847e0b380
all: rename gl_shader_stage_uses_workgroup to mesa_shader_stage_uses_workgroup
...
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Yonggang Luo <luoyonggang@gmail.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569 >
2025-08-06 10:28:41 +08:00
Qiang Yu
196569b1a4
all: rename gl_shader_stage to mesa_shader_stage
...
It's not only for GL, change to a generic name.
Use command:
find . -type f -not -path '*/.git/*' -exec sed -i 's/\bgl_shader_stage\b/mesa_shader_stage/g' {} +
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Yonggang Luo <luoyonggang@gmail.com >
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569 >
2025-08-06 10:28:40 +08:00
Alyssa Rosenzweig
bcf1a1c20b
treewide: use nir_def_block
...
Via Coccinelle patch:
@@
expression definition;
@@
-definition->parent_instr->block
+nir_def_block(definition)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Emma Anholt <emma@anholt.net >
Reviewed-by: Marek Olšák <maraeo@gmail.com >
Acked-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36489 >
2025-08-01 15:34:24 +00:00
Antonio Ospite
ddf2aa3a4d
build: avoid redefining unreachable() which is standard in C23
...
In the C23 standard unreachable() is now a predefined function-like
macro in <stddef.h>
See https://android.googlesource.com/platform/bionic/+/HEAD/docs/c23.md#is-now-a-predefined-function_like-macro-in
And this causes build errors when building for C23:
-----------------------------------------------------------------------
In file included from ../src/util/log.h:30,
from ../src/util/log.c:30:
../src/util/macros.h:123:9: warning: "unreachable" redefined
123 | #define unreachable(str) \
| ^~~~~~~~~~~
In file included from ../src/util/macros.h:31:
/usr/lib/gcc/x86_64-linux-gnu/14/include/stddef.h:456:9: note: this is the location of the previous definition
456 | #define unreachable() (__builtin_unreachable ())
| ^~~~~~~~~~~
-----------------------------------------------------------------------
So don't redefine it with the same name, but use the name UNREACHABLE()
to also signify it's a macro.
Using a different name also makes sense because the behavior of the
macro was extending the one of __builtin_unreachable() anyway, and it
also had a different signature, accepting one argument, compared to the
standard unreachable() with no arguments.
This change improves the chances of building mesa with the C23 standard,
which for instance is the default in recent AOSP versions.
All the instances of the macro, including the definition, were updated
with the following command line:
git grep -l '[^_]unreachable(' -- "src/**" | sort | uniq | \
while read file; \
do \
sed -e 's/\([^_]\)unreachable(/\1UNREACHABLE(/g' -i "$file"; \
done && \
sed -e 's/#undef unreachable/#undef UNREACHABLE/g' -i src/intel/isl/isl_aux_info.c
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36437 >
2025-07-31 17:49:42 +00:00
Alyssa Rosenzweig
4f1bafa6d5
nir: drop load_sample_id_no_per_sample
...
unused now.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36429 >
2025-07-30 22:13:23 +00:00
Marek Olšák
6a85761c4c
nir/divergence_analysis: simplify nir_vertex_divergence_analysis
...
by reusing nir_divergence_analysis_impl.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36099 >
2025-07-24 18:41:38 +00:00
Alyssa Rosenzweig
3f795a2b8d
nir/divergence_analysis: handle more AGX
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Marek Olšák <maraeo@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36265 >
2025-07-23 14:15:57 +00:00
Rhys Perry
8fd5266b69
nir/divergence: ignore boolean phis for ignore_undef_if_phi_srcs
...
The only user of this option (ACO) doesn't support this for boolean phis.
fossil-db (navi21):
Totals from 1208 (1.51% of 79825) affected shaders:
Instrs: 826592 -> 823201 (-0.41%); split: -0.41%, +0.00%
CodeSize: 4228296 -> 4224280 (-0.09%); split: -0.11%, +0.01%
Latency: 3030803 -> 3028410 (-0.08%); split: -0.08%, +0.01%
InvThroughput: 578588 -> 578693 (+0.02%); split: -0.00%, +0.02%
VClause: 19500 -> 19494 (-0.03%)
Copies: 60914 -> 57589 (-5.46%); split: -5.47%, +0.01%
PreVGPRs: 50759 -> 50774 (+0.03%)
VALU: 528582 -> 528671 (+0.02%); split: -0.00%, +0.02%
SALU: 121134 -> 117646 (-2.88%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Backport-to: 25.1
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13455
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13509
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36005 >
2025-07-21 08:27:01 +00:00
Alyssa Rosenzweig
24c708564f
nir: add bindless_sampler_agx intrinsic
...
to facilitate pushing on AGX.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36127 >
2025-07-16 18:27:17 +00:00
Mary Guillemard
90438bae51
nir: Add NVIDIA-specific muladd intrinsics
...
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32777 >
2025-07-15 23:34:31 +00:00
Natalie Vock
9707b30965
nir,aco: Add ds_bvh_stack_rtn
...
This is a ds instruction that also overwrites its first input, so
introduce a new ds format with two outputs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35269 >
2025-07-15 21:34:39 +00:00
Dave Airlie
2273b6c46a
nak: add divergent attribute and wrapper for nir_load_sysval_nv
...
This wraps the sysval load in a builder where we can add
proper divergence for ctaid later.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36105 >
2025-07-15 19:07:11 +00:00
Alyssa Rosenzweig
ee26938faf
nir,agx: switch to bindless_image_agx intrinsic
...
this is more explicit than vec2's and hence has fewer footguns. in particular
it's easier to handle with preambles in a sane way.
modelled on what ir3 does.
there's probably room for more clean up but for now this unblocks what I want to
do.
stats don't seem concerning.
Totals from 692 (1.29% of 53701) affected shaders:
MaxWaves: 441920 -> 442112 (+0.04%)
Instrs: 1588748 -> 1589304 (+0.03%); split: -0.05%, +0.08%
CodeSize: 11487976 -> 11491620 (+0.03%); split: -0.04%, +0.07%
ALU: 1234867 -> 1235407 (+0.04%); split: -0.06%, +0.10%
FSCIB: 1234707 -> 1235249 (+0.04%); split: -0.06%, +0.10%
IC: 380514 -> 380518 (+0.00%)
GPRs: 117292 -> 117332 (+0.03%); split: -0.08%, +0.11%
Preamble instrs: 314064 -> 313948 (-0.04%); split: -0.05%, +0.01%
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35949 >
2025-07-10 14:55:17 -04:00
Mel Henning
94f4fc12ea
nir/divergence_analysis: Add NV_shader_sm_builtins
...
Fixes crucible func.nv.shader-sm-builtins.q0
Fixes: a3839dbb90 ("nak: Change divergence analysis pass order")
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36011 >
2025-07-09 16:47:28 +00:00
Marek Olšák
4263b49778
ac/nir: remove ngg_scratch LDS ABI, allocate it in the lowering pass
...
This is a cleanup.
Old gs LDS layout: [es outputs][gs outputs][scratch]
Old nogs LDS layout: [xfb/cull][scratch]
New gs LDS layout: [es outputs][scratch|gs outputs]
New nogs LDS layout: [scratch|xfb/cull]
The LDS scratch is moved to the beginning of the preceding buffer in LDS,
while the addresses in that LDS buffer are offset by the scratch size.
It effectively merges the LDS scratch with the preceding buffer in LDS.
Thanks to that, we no longer need the ngg_scratch ABI and the offset
in a user SGPR.
The lowering passes now return the LDS scratch size, which is used
by the drivers to determine the final LDS size.
The ngg_lds_layout SGPR is now unused without GS in RADV.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35352 >
2025-07-02 20:27:41 +00:00
Alyssa Rosenzweig
16b53d356a
nir: add rasterization_stream sysval
...
for plumbing transformFeedbackRasterizationStreamSelect (in turn for exercising
more CTS and proving out my design).
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35802 >
2025-06-30 16:24:06 +00:00
Lionel Landwerlin
fcf4401824
brw: handle wa_18019110168 with independent shader compilation
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35103 >
2025-06-28 05:55:35 +00:00
Matt Turner
102d7409ef
nir: Add convert_cmat_intel intrinsic
...
This intrinsic will be used to implement matrix type and layout
conversions in the backend compiler.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35616 >
2025-06-27 01:26:22 +00:00
Alyssa Rosenzweig
caa0854da8
nir: plumb load_global_bounded
...
this lets the backend implement bounded loads (i.e. robust SSBOs) in a way
that's more clever than a full branch. similar idea to
load_global_constant_bound which should eventually be merged into this.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Job Noorman <job@noorman.info >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35720 >
2025-06-26 16:41:53 +00:00
Lionel Landwerlin
16fca611d7
nir: add new intel ssbo intrinsics
...
Similar to ir3 ones, to optimize offsets in the backend.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35252 >
2025-06-22 10:55:23 +00:00
Lionel Landwerlin
8ea124f877
nir/divergence: add missing intel intrinsics
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Rohan Garg <rohan.garg@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35252 >
2025-06-22 10:55:21 +00:00
Alyssa Rosenzweig
5795c8595f
nir: model dynamic uniform layout on hk
...
add some new intrinsics so we can defer lowering until we have the information.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35658 >
2025-06-20 18:46:13 +00:00
Faith Ekstrand
9f9cde04ec
nir: Add a new load_input_attachment_coord intrinsic
...
This hoists all the annoyance of figuring out the current pixel's input
attachment coordinates to the driver. The pass still deals with all the
annoyance of turning an image instruciton into a texture instruction but
it gives the driver more control over the position. For most drivers,
this will be something like ivec3(int(gl_FragCoord.xy), gl_Layer) or
similar, some drivers need something more nuanced. Turnip, for
instance, needs unscaled coordinates for some attachments and NVK
doesn't really want gl_Layer or gl_ViewIndex for the layer. It's better
to just have a new system value that drivers can make what they want.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35551 >
2025-06-19 02:14:04 +00:00
Emma Anholt
7db62e6dad
nir: Split nir_load_frag_coord_zw to separate z/w intrinsics.
...
This will be a win for Intel for tracking which payload values need to be
set up.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190 >
2025-06-18 23:11:36 +00:00
Job Noorman
78f62d6d6d
nir: remove unused global_atomic(_swap)_ir3 intrinsics
...
ir3 switched to using the generic ones.
Signed-off-by: Job Noorman <jnoorman@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797 >
2025-06-18 19:06:33 +00:00
Olivia Lee
88ac602cc2
panvk: implement shaderInputAttachmentArrayNonUniformIndexing
...
Signed-off-by: Olivia Lee <olivia.lee@collabora.com >
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com >
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408 >
2025-06-13 19:02:19 +00:00
Marek Olšák
a59464b6e3
radv,radeonsi: precompute and pass TCS per-vertex output stride via a user SGPR
...
It's a stride of 1 output, which isn't 16. It's 16 * num_threads,
aligned to 256.
tcs_offchip_layout has 5 unused bits, so let's use them.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780 >
2025-06-07 16:29:39 +00:00
Mel Henning
d15b5fadbb
nir/divergence_analysis: Update LCSSA comment
...
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35271 >
2025-06-06 18:15:05 +00:00
Lorenzo Rossi
2c0d0bad01
nak: Remove unused intrinsic image_load_raw_nv
...
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34975 >
2025-05-28 01:47:19 +00:00
Lorenzo Rossi
5fbcdd6e32
nir,nak: Add NV-specific image intrinsics
...
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34975 >
2025-05-28 01:47:19 +00:00
Lorenzo Rossi
47f6c74b71
nir,nak: Add KeplerB shared atomics intrinsics and lowering
...
Kepler cards do not support shared atomic operations directly, but they
have special ldslk and stsul that can implement mutex locks on
addresses. Shared atomics can be lowered into operations in mutexes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35028 >
2025-05-26 16:29:05 +00:00
Lorenzo Rossi
ee4cff7603
nvk: nak: Add OpViLd support
...
Kepler and earlier GPUs do not support the ISBERD instruction but have a
different VILD (Vertex Indirect Load) instruction that provides less
functionality. This commit adds support for the op in nak and nir,
needed for the upcoming encoder commit.
Signed-off-by: Lorenzo Rossi <snowycoder@gmail.com >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34329 >
2025-05-12 16:41:48 +00:00
Lionel Landwerlin
9d342081e7
brw/nir: add intrinsics to read attribute payload register indirectly
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109 >
2025-05-08 06:48:35 +00:00
Lionel Landwerlin
c467444670
brw/nir: use a new intrinsic for fs_msaa_flag
...
Avoid NIR code doing offset computations.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109 >
2025-05-08 06:48:34 +00:00
Ella Stanforth
b38c4e8982
nir/alpha_to_coverage: Add an intrinsic for better dithering
...
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33942 >
2025-04-23 09:03:41 +00:00
Konstantin Seurer
978e9b670e
aco,nir: Add support for new GFX12 ray tracing instructions
...
Adds image_bvh_dual_intersect_ray and image_bvh8_intersect_ray which can
handle the new BVH format. Both instructions write up to 10 VGPRs so
they need to use a vec16 definition in nir.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34273 >
2025-04-17 20:20:40 +00:00
Faith Ekstrand
6aa2c152b8
nak,nir: Add an image_load_raw_nv intrinsic
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34336 >
2025-04-08 04:06:45 +00:00
Lionel Landwerlin
772beb0ebf
nir: add support for lowering non uniform texture offsets
...
Intel HW only has support for non-uniform offsets for TG4 operations.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Ivan Briano <ivan.briano@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33138 >
2025-03-29 02:15:18 +00:00
Mary Guillemard
e0be93d881
nir: Add Panfrost specific shader_output intrinsic
...
On Avalon, this is a bitfield that holds information on what
values a vertex shader should output.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com >
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33910 >
2025-03-10 07:38:16 +01:00
Faith Ekstrand
a65009e808
nir: Add a nir_opt_tex_skip_helpers optimization
...
Arm and NVIDIA hardware both have this as a bit you can set on the
texture instruction so we may as well have a shared pass for it.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33402 >
2025-03-01 08:44:15 +00:00
Alyssa Rosenzweig
9a58a8257e
treewide: Switch to nir_progress
...
Via the Coccinelle patch at the end of the commit message, followed by
sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog')
ninja -C ~/mesa/build clang-format
cd ~/mesa/src/compiler/nir && clang-format -i *.c
agxfmt
@@
identifier prog;
expression impl, metadata;
@@
-if (prog) {
-nir_metadata_preserve(impl, metadata);
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
-return prog;
+return nir_progress(prog, impl, metadata);
@@
expression prog_expr, impl, metadata;
@@
-if (prog_expr) {
-nir_metadata_preserve(impl, metadata);
-return true;
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-return false;
-}
+bool progress = prog_expr;
+return nir_progress(progress, impl, metadata);
@@
identifier prog;
expression impl, metadata;
@@
-nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all);
-return prog;
+return nir_progress(prog, impl, metadata);
@@
identifier prog;
expression impl, metadata;
@@
-nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all);
+nir_progress(prog, impl, metadata);
@@
expression impl, metadata;
@@
-nir_metadata_preserve(impl, metadata);
-return true;
+return nir_progress(true, impl, metadata);
@@
expression impl;
@@
-nir_metadata_preserve(impl, nir_metadata_all);
-return false;
+return nir_no_progress(impl);
@@
identifier other_prog, prog;
expression impl, metadata;
@@
-if (prog) {
-nir_metadata_preserve(impl, metadata);
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
-other_prog |= prog;
+other_prog = other_prog | nir_progress(prog, impl, metadata);
@@
identifier prog;
expression impl, metadata;
@@
-if (prog) {
-nir_metadata_preserve(impl, metadata);
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
+nir_progress(prog, impl, metadata);
@@
identifier other_prog, prog;
expression impl, metadata;
@@
-if (prog) {
-nir_metadata_preserve(impl, metadata);
-other_prog = true;
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
+other_prog = other_prog | nir_progress(prog, impl, metadata);
@@
expression prog_expr, impl, metadata;
identifier prog;
@@
-if (prog_expr) {
-nir_metadata_preserve(impl, metadata);
-prog = true;
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
+bool impl_progress = prog_expr;
+prog = prog | nir_progress(impl_progress, impl, metadata);
@@
identifier other_prog, prog;
expression impl, metadata;
@@
-if (prog) {
-other_prog = true;
-nir_metadata_preserve(impl, metadata);
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
+other_prog = other_prog | nir_progress(prog, impl, metadata);
@@
expression prog_expr, impl, metadata;
identifier prog;
@@
-if (prog_expr) {
-prog = true;
-nir_metadata_preserve(impl, metadata);
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
+bool impl_progress = prog_expr;
+prog = prog | nir_progress(impl_progress, impl, metadata);
@@
expression prog_expr, impl, metadata;
@@
-if (prog_expr) {
-nir_metadata_preserve(impl, metadata);
-} else {
-nir_metadata_preserve(impl, nir_metadata_all);
-}
+bool impl_progress = prog_expr;
+nir_progress(impl_progress, impl, metadata);
@@
identifier prog;
expression impl, metadata;
@@
-nir_metadata_preserve(impl, metadata);
-prog = true;
+prog = nir_progress(true, impl, metadata);
@@
identifier prog;
expression impl, metadata;
@@
-if (prog) {
-nir_metadata_preserve(impl, metadata);
-}
-return prog;
+return nir_progress(prog, impl, metadata);
@@
identifier prog;
expression impl, metadata;
@@
-if (prog) {
-nir_metadata_preserve(impl, metadata);
-}
+nir_progress(prog, impl, metadata);
@@
expression impl;
@@
-nir_metadata_preserve(impl, nir_metadata_all);
+nir_no_progress(impl);
@@
expression impl, metadata;
@@
-nir_metadata_preserve(impl, metadata);
+nir_progress(true, impl, metadata);
squashme! sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog')
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33722 >
2025-02-26 15:19:53 +00:00
Alyssa Rosenzweig
91872c9c51
nir: clang-format
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33722 >
2025-02-26 15:19:53 +00:00