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nir: clang-format

Browse Source 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33722>
This commit is contained in:
Alyssa Rosenzweig
2025-02-24 15:09:24 -05:00
committed by Marge Bot
parent 298788bfde
commit 91872c9c51
65 changed files with 500 additions and 499 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/compiler/nir/nir.c
+5 -5
View File
@@ -429,12 +429,13 @@ nir_find_state_variable(nir_shader *s,
return NULL;
}
nir_variable *nir_find_sampler_variable_with_tex_index(nir_shader *shader,
unsigned texture_index)
nir_variable *
nir_find_sampler_variable_with_tex_index(nir_shader *shader,
unsigned texture_index)
{
nir_foreach_variable_with_modes(var, shader, nir_var_uniform) {
unsigned size =
glsl_type_is_array(var->type) ? glsl_array_size(var->type) : 1;
glsl_type_is_array(var->type) ? glsl_array_size(var->type) : 1;
if ((glsl_type_is_texture(glsl_without_array(var->type)) ||
glsl_type_is_sampler(glsl_without_array(var->type))) &&
(var->data.binding == texture_index ||
@@ -2903,7 +2904,7 @@ nir_alu_type
nir_get_nir_type_for_glsl_base_type(enum glsl_base_type base_type)
{
switch (base_type) {
/* clang-format off */
/* clang-format off */
case GLSL_TYPE_BOOL: return nir_type_bool1;
case GLSL_TYPE_UINT: return nir_type_uint32;
case GLSL_TYPE_INT: return nir_type_int32;
@@ -3654,4 +3655,3 @@ nir_atomic_op_to_alu(nir_atomic_op op)
unreachable("Invalid nir_atomic_op");
}
src/compiler/nir/nir_builder.c
-1
View File
@@ -395,7 +395,6 @@ nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
instr_info->filename = cursor_info->filename;
}
/* Move the cursor forward. */
build->cursor = nir_after_instr(instr);
}
src/compiler/nir/nir_clone.c
+1 -2
View File
@@ -21,10 +21,10 @@
* IN THE SOFTWARE.
*/
#include "util/u_printf.h"
#include "nir.h"
#include "nir_control_flow.h"
#include "nir_xfb_info.h"
#include "util/u_printf.h"
/* Secret Decoder Ring:
* clone_foo():
@@ -788,7 +788,6 @@ clone_printf_info(void *mem_ctx, const nir_shader *s)
infos[i].arg_sizes = ralloc_memdup(mem_ctx, src_info->arg_sizes,
sizeof(infos[i].arg_sizes[0]) * src_info->num_args);
infos[i].string_size = src_info->string_size;
infos[i].strings = ralloc_memdup(mem_ctx, src_info->strings,
src_info->string_size);
src/compiler/nir/nir_deref.c
+5 -5
View File
@@ -453,8 +453,8 @@ nir_fixup_deref_modes(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, nir_fixup_deref_modes_instr,
nir_metadata_control_flow |
nir_metadata_live_defs |
nir_metadata_instr_index,
nir_metadata_live_defs |
nir_metadata_instr_index,
NULL);
}
@@ -472,7 +472,7 @@ nir_fixup_deref_types_instr(UNUSED struct nir_builder *b, nir_instr *instr, UNUS
deref->deref_type == nir_deref_type_array_wildcard) {
nir_deref_instr *parent = nir_src_as_deref(deref->parent);
parent_derived_type = glsl_get_array_element(parent->type);
} else if (deref->deref_type == nir_deref_type_struct) {
} else if (deref->deref_type == nir_deref_type_struct) {
nir_deref_instr *parent = nir_src_as_deref(deref->parent);
parent_derived_type = glsl_get_struct_field(parent->type, deref->strct.index);
} else if (deref->deref_type == nir_deref_type_ptr_as_array) {
@@ -497,8 +497,8 @@ nir_fixup_deref_types(nir_shader *shader)
{
return nir_shader_instructions_pass(shader, nir_fixup_deref_types_instr,
nir_metadata_control_flow |
nir_metadata_live_defs |
nir_metadata_instr_index,
nir_metadata_live_defs |
nir_metadata_instr_index,
NULL);
}
src/compiler/nir/nir_divergence_analysis.c
-1
View File
@@ -160,7 +160,6 @@ visit_alu(nir_alu_instr *instr, struct divergence_state *state)
return false;
}
/* On some HW uniform loads where there is a pending store/atomic from another
* wave can "tear" so that different invocations see the pre-store value and
* the post-store value even though they are loading from the same location.
src/compiler/nir/nir_format_convert.c
+36 -20
View File
@@ -23,8 +23,8 @@
#include "nir_format_convert.h"
#include "util/format_rgb9e5.h"
#include "util/format/u_format.h"
#include "util/format_rgb9e5.h"
#include "util/macros.h"
nir_def *
@@ -216,9 +216,15 @@ _nir_format_norm_factor(nir_builder *b, const unsigned *bits,
* assert(bits[i] <= 16). But if it's not, you get to pick up the pieces.
*/
switch (bit_size) {
case 32: factor[i].f32 = (1ull << (bits[i] - is_signed)) - 1; break;
case 64: factor[i].f64 = (1ull << (bits[i] - is_signed)) - 1; break;
default: unreachable("invalid bit size"); break;
case 32:
factor[i].f32 = (1ull << (bits[i] - is_signed)) - 1;
break;
case 64:
factor[i].f64 = (1ull << (bits[i] - is_signed)) - 1;
break;
default:
unreachable("invalid bit size");
break;
}
}
return nir_build_imm(b, num_components, bit_size, factor);
@@ -287,7 +293,7 @@ nir_format_float_to_uscaled(nir_builder *b, nir_def *f, const unsigned *bits)
}
f = nir_fclamp(b, f, nir_imm_float(b, 0),
nir_build_imm(b, f->num_components, 32, max));
nir_build_imm(b, f->num_components, 32, max));
return nir_f2u32(b, nir_fround_even(b, f));
}
@@ -305,7 +311,7 @@ nir_format_float_to_sscaled(nir_builder *b, nir_def *f, const unsigned *bits)
}
f = nir_fclamp(b, f, nir_build_imm(b, f->num_components, 32, min),
nir_build_imm(b, f->num_components, 32, max));
nir_build_imm(b, f->num_components, 32, max));
return nir_f2i32(b, nir_fround_even(b, f));
}
@@ -430,8 +436,8 @@ nir_def *
nir_format_unpack_r9g9b9e5(nir_builder *b, nir_def *packed)
{
nir_def *rgb = nir_vec3(b, nir_ubitfield_extract_imm(b, packed, 0, 9),
nir_ubitfield_extract_imm(b, packed, 9, 9),
nir_ubitfield_extract_imm(b, packed, 18, 9));
nir_ubitfield_extract_imm(b, packed, 9, 9),
nir_ubitfield_extract_imm(b, packed, 18, 9));
/* exponent = (rgb >> 27) - RGB9E5_EXP_BIAS - RGB9E5_MANTISSA_BITS;
* scale.u = (exponent + 127) << 23;
@@ -456,7 +462,7 @@ nir_format_pack_r9g9b9e5(nir_builder *b, nir_def *color)
b->exact = true;
nir_def *clamped =
nir_fmin(b, nir_fmax(b, color, nir_imm_float(b, 0)),
nir_imm_float(b, MAX_RGB9E5));
nir_imm_float(b, MAX_RGB9E5));
b->exact = exact_save;
/* maxrgb.u = MAX3(rc.u, gc.u, bc.u); */
@@ -515,17 +521,17 @@ nir_format_unpack_rgba(nir_builder *b, nir_def *packed,
case PIPE_FORMAT_R9G9B9E5_FLOAT: {
nir_def *rgb = nir_format_unpack_r9g9b9e5(b, packed);
return nir_vec4(b, nir_channel(b, rgb, 0),
nir_channel(b, rgb, 1),
nir_channel(b, rgb, 2),
nir_imm_float(b, 1.0));
nir_channel(b, rgb, 1),
nir_channel(b, rgb, 2),
nir_imm_float(b, 1.0));
}
case PIPE_FORMAT_R11G11B10_FLOAT: {
nir_def *rgb = nir_format_unpack_11f11f10f(b, packed);
return nir_vec4(b, nir_channel(b, rgb, 0),
nir_channel(b, rgb, 1),
nir_channel(b, rgb, 2),
nir_imm_float(b, 1.0));
nir_channel(b, rgb, 1),
nir_channel(b, rgb, 2),
nir_imm_float(b, 1.0));
}
default:
@@ -538,7 +544,9 @@ nir_format_unpack_rgba(nir_builder *b, nir_def *packed,
nir_def *unpacked;
if (desc->block.bits <= 32) {
unsigned bits[4] = { 0, };
unsigned bits[4] = {
0,
};
for (uint32_t c = 0; c < desc->nr_channels; c++) {
if (c != 0) {
assert(desc->channel[c].shift ==
@@ -557,7 +565,9 @@ nir_format_unpack_rgba(nir_builder *b, nir_def *packed,
unpacked = nir_trim_vector(b, unpacked, desc->nr_channels);
}
nir_def *comps[4] = { NULL, };
nir_def *comps[4] = {
NULL,
};
for (uint32_t c = 0; c < desc->nr_channels; c++) {
const struct util_format_channel_description *chan = &desc->channel[c];
@@ -615,7 +625,9 @@ nir_format_unpack_rgba(nir_builder *b, nir_def *packed,
}
}
nir_def *swiz_comps[4] = { NULL, };
nir_def *swiz_comps[4] = {
NULL,
};
for (uint32_t i = 0; i < 4; i++) {
enum pipe_swizzle s = desc->swizzle[i];
switch (s) {
@@ -685,7 +697,9 @@ nir_format_pack_rgba(nir_builder *b, enum pipe_format format, nir_def *rgba)
rgba = srgb;
}
nir_def *comps[4] = { NULL, };
nir_def *comps[4] = {
NULL,
};
for (uint32_t i = 0; i < 4; i++) {
enum pipe_swizzle s = desc->swizzle[i];
if (s < PIPE_SWIZZLE_X || s > PIPE_SWIZZLE_W)
@@ -760,7 +774,9 @@ nir_format_pack_rgba(nir_builder *b, enum pipe_format format, nir_def *rgba)
nir_def *encoded = nir_vec(b, comps, desc->nr_channels);
if (desc->block.bits <= 32) {
unsigned bits[4] = { 0, };
unsigned bits[4] = {
0,
};
for (uint32_t c = 0; c < desc->nr_channels; c++) {
if (c != 0) {
assert(desc->channel[c].shift ==
src/compiler/nir/nir_functions.c
+11 -9
View File
@@ -21,11 +21,11 @@
* IN THE SOFTWARE.
*/
#include "util/u_printf.h"
#include "nir.h"
#include "nir_builder.h"
#include "nir_control_flow.h"
#include "nir_vla.h"
#include "util/u_printf.h"
/*
* TODO: write a proper inliner for GPUs.
@@ -206,9 +206,10 @@ nir_inline_function_impl(struct nir_builder *b,
static bool inline_function_impl(nir_function_impl *impl, struct set *inlined);
static bool inline_functions_pass(nir_builder *b,
nir_instr *instr,
void *cb_data)
static bool
inline_functions_pass(nir_builder *b,
nir_instr *instr,
void *cb_data)
{
struct set *inlined = cb_data;
if (instr->type != nir_instr_type_call)
@@ -412,7 +413,7 @@ lower_calls_vars_instr(struct nir_builder *b,
b->cursor = nir_before_instr(instr);
nir_src_rewrite(&intrin->src[0],
nir_iadd_imm(b, intrin->src[0].ssa,
state->printf_index_offset));
state->printf_index_offset));
break;
}
default:
@@ -497,9 +498,9 @@ nir_link_shader_functions(nir_shader *shader,
shader->printf_info = reralloc(shader, shader->printf_info,
u_printf_info,
shader->printf_info_count +
link_shader->printf_info_count);
link_shader->printf_info_count);
for (unsigned i = 0; i < link_shader->printf_info_count; i++){
for (unsigned i = 0; i < link_shader->printf_info_count; i++) {
const u_printf_info *src_info = &link_shader->printf_info[i];
u_printf_info *dst_info = &shader->printf_info[shader->printf_info_count++];
@@ -522,8 +523,9 @@ nir_link_shader_functions(nir_shader *shader,
static void
nir_mark_used_functions(struct nir_function *func, struct set *used_funcs);
static bool mark_used_pass_cb(struct nir_builder *b,
nir_instr *instr, void *data)
static bool
mark_used_pass_cb(struct nir_builder *b,
nir_instr *instr, void *data)
{
struct set *used_funcs = data;
if (instr->type != nir_instr_type_call)
src/compiler/nir/nir_gather_info.c
+3 -2
View File
@@ -88,7 +88,7 @@ get_deref_info(nir_shader *shader, nir_variable *var, nir_deref_instr *deref,
*indirect |= !nir_src_is_const((*p)->arr.index);
} else if ((*p)->deref_type == nir_deref_type_struct) {
/* Struct indices are always constant. */
} else if ((*p)->deref_type == nir_deref_type_array_wildcard) {
} else if ((*p)->deref_type == nir_deref_type_array_wildcard) {
/* Wilcards ref the whole array dimension and should get lowered
* to direct deref at a later point.
*/
@@ -459,7 +459,8 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
case VARYING_SLOT_TESS_LEVEL_OUTER:
num_slots = DIV_ROUND_UP(num_slots, 4);
break;
default: break;
default:
break;
}
}
slot_mask = BITFIELD64_RANGE(semantics.location, num_slots);
src/compiler/nir/nir_gather_tcs_info.c
+10 -10
View File
@@ -4,9 +4,9 @@
* SPDX-License-Identifier: MIT
*/
#include "nir_tcs_info.h"
#include "nir.h"
#include <math.h>
#include "nir.h"
#include "nir_tcs_info.h"
static unsigned
get_tess_level_component(nir_intrinsic_instr *intr)
@@ -49,7 +49,7 @@ scan_tess_levels(struct exec_list *cf_list, unsigned *upper_block_tl_writemask,
switch (cf_node->type) {
case nir_cf_node_block: {
nir_block *block = nir_cf_node_as_block(cf_node);
nir_foreach_instr (instr, block) {
nir_foreach_instr(instr, block) {
if (instr->type != nir_instr_type_intrinsic)
continue;
@@ -236,8 +236,7 @@ nir_gather_tcs_info(const nir_shader *nir, nir_tcs_info *info,
* If the primitive type is unspecified, we have to assume the worst case.
*/
unsigned min_outer, min_inner, max_outer, max_inner;
mesa_count_tess_level_components(prim == TESS_PRIMITIVE_UNSPECIFIED ?
TESS_PRIMITIVE_ISOLINES : prim,
mesa_count_tess_level_components(prim == TESS_PRIMITIVE_UNSPECIFIED ? TESS_PRIMITIVE_ISOLINES : prim,
&min_outer, &min_inner);
mesa_count_tess_level_components(prim, &max_outer, &max_inner);
const unsigned min_valid_outer_comp_mask = BITFIELD_RANGE(0, min_outer);
@@ -297,23 +296,24 @@ nir_gather_tcs_info(const nir_shader *nir, nir_tcs_info *info,
/* The (0, 1] range of outer[0]. */
(tess_level_writes_le_one & ~tess_level_writes_le_zero &
~tess_level_writes_le_two & ~tess_level_writes_other & 0x1) ==
(tess_level_writes_any & 0x1) &&
(tess_level_writes_any & 0x1) &&
/* The (0, 2] range of outer[1]. */
((tess_level_writes_le_one | tess_level_writes_le_two) &
~tess_level_writes_le_zero & ~tess_level_writes_other & 0x2) ==
(tess_level_writes_any & 0x2);
(tess_level_writes_any & 0x2);
bool triquads_are_eff_one =
/* The (0, 2] outer range. */
((tess_level_writes_le_one | tess_level_writes_le_two) &
~tess_level_writes_le_zero & ~tess_level_writes_other &
max_valid_outer_comp_mask) ==
(tess_level_writes_any & max_valid_outer_comp_mask) &&
(tess_level_writes_any & max_valid_outer_comp_mask) &&
/* The [-inf, 2] inner range. */
((tess_level_writes_le_zero | tess_level_writes_le_one |
tess_level_writes_le_two) & ~tess_level_writes_other &
tess_level_writes_le_two) &
~tess_level_writes_other &
max_valid_inner_comp_mask) ==
(tess_level_writes_any & max_valid_inner_comp_mask);
(tess_level_writes_any & max_valid_inner_comp_mask);
if (prim == TESS_PRIMITIVE_UNSPECIFIED) {
info->all_tess_levels_are_effectively_one = isolines_are_eff_one &&
src/compiler/nir/nir_gather_xfb_info.c
+1 -1
View File
@@ -21,8 +21,8 @@
* IN THE SOFTWARE.
*/
#include "nir_xfb_info.h"
#include "nir.h"
#include "nir_xfb_info.h"
#include "util/u_dynarray.h"
#include <util/u_math.h>
src/compiler/nir/nir_inline_uniforms.c
+1 -1
View File
@@ -365,7 +365,7 @@ void
nir_find_inlinable_uniforms(nir_shader *shader)
{
uint32_t uni_offsets[MAX_INLINABLE_UNIFORMS];
uint8_t num_offsets[MAX_NUM_BO] = {0};
uint8_t num_offsets[MAX_NUM_BO] = { 0 };
nir_foreach_function_impl(impl, shader) {
nir_metadata_require(impl, nir_metadata_loop_analysis,
src/compiler/nir/nir_instr_set.c
+1 -1
View File
@@ -23,8 +23,8 @@
#include "nir_instr_set.h"
#include "util/half_float.h"
#include "nir_vla.h"
#include "nir.h"
#include "nir_vla.h"
#define XXH_INLINE_ALL
#include "util/xxhash.h"
src/compiler/nir/nir_loop_analyze.c
+27 -28
View File
@@ -636,28 +636,28 @@ invert_comparison_if_needed(nir_op alu_op, bool invert)
return alu_op;
switch (alu_op) {
case nir_op_fge:
return nir_op_flt;
case nir_op_ige:
return nir_op_ilt;
case nir_op_uge:
return nir_op_ult;
case nir_op_flt:
return nir_op_fge;
case nir_op_ilt:
return nir_op_ige;
case nir_op_ult:
return nir_op_uge;
case nir_op_feq:
return nir_op_fneu;
case nir_op_ieq:
return nir_op_ine;
case nir_op_fneu:
return nir_op_feq;
case nir_op_ine:
return nir_op_ieq;
default:
unreachable("Unsuported comparison!");
case nir_op_fge:
return nir_op_flt;
case nir_op_ige:
return nir_op_ilt;
case nir_op_uge:
return nir_op_ult;
case nir_op_flt:
return nir_op_fge;
case nir_op_ilt:
return nir_op_ige;
case nir_op_ult:
return nir_op_uge;
case nir_op_feq:
return nir_op_fneu;
case nir_op_ieq:
return nir_op_ine;
case nir_op_fneu:
return nir_op_feq;
case nir_op_ine:
return nir_op_ieq;
default:
unreachable("Unsuported comparison!");
}
}
@@ -744,8 +744,8 @@ get_iteration_empirical(nir_scalar cond, nir_alu_instr *incr_alu,
const nir_scalar incr = nir_get_scalar(&incr_alu->def, basis.comp);
const nir_scalar original[] = {basis, limit_basis};
nir_const_value replacement[] = {initial, limit};
const nir_scalar original[] = { basis, limit_basis };
nir_const_value replacement[] = { initial, limit };
while (iter_count <= max_unroll_iterations) {
bool success;
@@ -998,8 +998,7 @@ try_find_trip_count_vars_in_logical_op(nir_scalar *cond,
{
const nir_op alu_op = nir_scalar_alu_op(*cond);
bool exit_loop_on_false = alu_op == nir_op_ieq || alu_op == nir_op_inot;
nir_scalar logical_op = exit_loop_on_false ?
nir_scalar_chase_alu_src(*cond, 0) : *cond;
nir_scalar logical_op = exit_loop_on_false ? nir_scalar_chase_alu_src(*cond, 0) : *cond;
if (alu_op == nir_op_ieq) {
nir_scalar zero = nir_scalar_chase_alu_src(*cond, 1);
@@ -1177,8 +1176,8 @@ find_trip_count(loop_info_state *state, unsigned execution_mode,
* iterations
*/
bool can_find_max_trip_count = step_alu->op == nir_op_iadd &&
((alu_op == nir_op_uge && !invert_cond && limit_rhs) ||
(alu_op == nir_op_ult && !invert_cond && !limit_rhs));
((alu_op == nir_op_uge && !invert_cond && limit_rhs) ||
(alu_op == nir_op_ult && !invert_cond && !limit_rhs));
/* nir_op_isub should have been lowered away by this point */
assert(step_alu->op != nir_op_isub);
src/compiler/nir/nir_lower_alu.c
-1
View File
@@ -110,7 +110,6 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *instr, UNUSED void *cb_data)
nir_def *c0f0f0f0f = nir_imm_intN_t(b, 0x0f0f0f0f, bit_size);
nir_def *c01010101 = nir_imm_intN_t(b, 0x01010101, bit_size);
lowered = nir_isub(b, lowered,
nir_iand(b, nir_ushr(b, lowered, c1), c55555555));
src/compiler/nir/nir_lower_atomics.c
+5 -6
View File
@@ -47,7 +47,7 @@ static nir_def *
build_atomic(nir_builder *b, nir_intrinsic_instr *intr)
{
nir_def *load;
switch(intr->intrinsic) {
switch (intr->intrinsic) {
case nir_intrinsic_ssbo_atomic:
load = nir_load_ssbo(b, 1, intr->def.bit_size, intr->src[0].ssa,
intr->src[1].ssa,
@@ -69,8 +69,7 @@ build_atomic(nir_builder *b, nir_intrinsic_instr *intr)
unreachable("unsupported atomic type");
}
nir_def *data = intr->intrinsic == nir_intrinsic_ssbo_atomic ?
intr->src[2].ssa : intr->src[1].ssa;
nir_def *data = intr->intrinsic == nir_intrinsic_ssbo_atomic ? intr->src[2].ssa : intr->src[1].ssa;
nir_loop *loop = nir_push_loop(b);
nir_def *xchg;
{
@@ -80,10 +79,10 @@ build_atomic(nir_builder *b, nir_intrinsic_instr *intr)
nir_def *before = &phi->def;
nir_def *expected = nir_build_alu2(
b, nir_atomic_op_to_alu(nir_intrinsic_atomic_op(intr)), before, data);
nir_alu_instr* op = nir_instr_as_alu(expected->parent_instr);
nir_alu_instr *op = nir_instr_as_alu(expected->parent_instr);
op->exact = true;
op->fp_fast_math = 0;
switch(intr->intrinsic) {
switch (intr->intrinsic) {
case nir_intrinsic_ssbo_atomic:
xchg = nir_ssbo_atomic_swap(b, intr->def.bit_size,
intr->src[0].ssa,
@@ -92,7 +91,7 @@ build_atomic(nir_builder *b, nir_intrinsic_instr *intr)
.atomic_op = nir_atomic_op_cmpxchg);
break;
case nir_intrinsic_shared_atomic:
xchg = nir_shared_atomic_swap(b,intr->def.bit_size,
xchg = nir_shared_atomic_swap(b, intr->def.bit_size,
intr->src[0].ssa,
before, expected,
.atomic_op = nir_atomic_op_cmpxchg);
src/compiler/nir/nir_lower_bitmap.c
+1 -1
View File
@@ -59,7 +59,7 @@ lower_bitmap(nir_shader *shader, nir_builder *b,
nir_def *cond;
nir_def *baryc =
nir_load_barycentric_pixel(b, 32, .interp_mode = INTERP_MODE_SMOOTH);
nir_load_barycentric_pixel(b, 32, .interp_mode = INTERP_MODE_SMOOTH);
texcoord = nir_load_interpolated_input(b, 4, 32, baryc, nir_imm_int(b, 0),
.io_semantics.location = VARYING_SLOT_TEX0);
src/compiler/nir/nir_lower_clip.c
+10 -10
View File
@@ -145,7 +145,7 @@ load_clipdist_input(nir_builder *b, nir_variable *in, int location_offset,
static nir_def *
find_output(nir_builder *b, unsigned location)
{
nir_def *comp[4] = {NULL};
nir_def *comp[4] = { NULL };
nir_foreach_function_impl(impl, b->shader) {
nir_foreach_block(block, impl) {
@@ -268,7 +268,7 @@ struct lower_clip_state {
static void
lower_clip_vertex_var(nir_builder *b, const struct lower_clip_state *state)
{
nir_def *clipdist[MAX_CLIP_PLANES] = {NULL};
nir_def *clipdist[MAX_CLIP_PLANES] = { NULL };
nir_def *cv = nir_load_var(b, state->clipvertex ? state->clipvertex
: state->position);
@@ -309,15 +309,16 @@ lower_clip_vertex_var(nir_builder *b, const struct lower_clip_state *state)
static void
lower_clip_vertex_intrin(nir_builder *b, const struct lower_clip_state *state)
{
nir_def *clipdist[MAX_CLIP_PLANES] = {NULL};
nir_def *clipdist[MAX_CLIP_PLANES] = { NULL };
nir_def *cv;
if (state->clipvertex_gs_temp) {
cv = nir_load_deref(b, nir_build_deref_var(b, state->clipvertex_gs_temp));
} else {
cv = find_output(b, b->shader->info.outputs_written &
VARYING_BIT_CLIP_VERTEX ?
VARYING_SLOT_CLIP_VERTEX : VARYING_SLOT_POS);
VARYING_BIT_CLIP_VERTEX
? VARYING_SLOT_CLIP_VERTEX
: VARYING_SLOT_POS);
}
for (int plane = 0; plane < MAX_CLIP_PLANES; plane++) {
@@ -388,7 +389,7 @@ nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables, bool use_vars,
assert(impl->end_block->predecessors->entries == 1);
b.cursor = nir_after_impl(impl);
struct lower_clip_state state = {NULL};
struct lower_clip_state state = { NULL };
state.ucp_enables = ucp_enables;
state.use_clipdist_array = use_clipdist_array;
state.clipplane_state_tokens = clipplane_state_tokens;
@@ -455,8 +456,7 @@ save_clipvertex_to_temp_gs(nir_builder *b, nir_intrinsic_instr *intr,
const struct lower_clip_state *state =
(const struct lower_clip_state *)opaque;
gl_varying_slot clip_output_slot =
b->shader->info.outputs_written & VARYING_BIT_CLIP_VERTEX ?
VARYING_SLOT_CLIP_VERTEX : VARYING_SLOT_POS;
b->shader->info.outputs_written & VARYING_BIT_CLIP_VERTEX ? VARYING_SLOT_CLIP_VERTEX : VARYING_SLOT_POS;
if (intr->intrinsic != nir_intrinsic_store_output ||
nir_intrinsic_io_semantics(intr).location != clip_output_slot)
@@ -470,7 +470,7 @@ save_clipvertex_to_temp_gs(nir_builder *b, nir_intrinsic_instr *intr,
/* Shift vector elements to the right by component. */
if (component) {
unsigned swizzle[4] = {0};
unsigned swizzle[4] = { 0 };
for (unsigned i = 1; i < value->num_components; i++)
swizzle[component + i] = i;
@@ -497,7 +497,7 @@ nir_lower_clip_gs(nir_shader *shader, unsigned ucp_enables,
if (!ucp_enables)
return false;
struct lower_clip_state state = {NULL};
struct lower_clip_state state = { NULL };
state.ucp_enables = ucp_enables;
state.use_clipdist_array = use_clipdist_array;
state.clipplane_state_tokens = clipplane_state_tokens;
src/compiler/nir/nir_lower_clip_cull_distance_arrays.c
+8 -10
View File
@@ -180,8 +180,8 @@ replace_var_declaration(struct lower_distance_state *state, nir_shader *sh,
sh->info.stage == MESA_SHADER_TESS_EVAL)) ||
sh->info.stage == MESA_SHADER_TESS_CTRL);
assert (glsl_get_base_type(glsl_get_array_element(glsl_get_array_element(var->type))) ==
GLSL_TYPE_FLOAT);
assert(glsl_get_base_type(glsl_get_array_element(glsl_get_array_element(var->type))) ==
GLSL_TYPE_FLOAT);
/* And change the properties that we need to change */
(*new_var)->type =
@@ -306,7 +306,7 @@ replace_with_derefs_to_vec4(nir_builder *b, nir_intrinsic_instr *intr,
void *cb_data)
{
struct lower_distance_state *state =
(struct lower_distance_state *) cb_data;
(struct lower_distance_state *)cb_data;
nir_variable_mode mask = nir_var_shader_in | nir_var_shader_out;
/* Copy deref lowering is expected to happen before we get here */
@@ -335,15 +335,14 @@ replace_with_derefs_to_vec4(nir_builder *b, nir_intrinsic_instr *intr,
return false;
if (var->data.mode == nir_var_shader_out &&
var != state->old_distance_out_var)
var != state->old_distance_out_var)
return false;
if (var->data.mode == nir_var_shader_in &&
var != state->old_distance_in_var)
return false;
nir_variable *new_var = var->data.mode == nir_var_shader_in ?
state->new_distance_in_var : state->new_distance_out_var;
nir_variable *new_var = var->data.mode == nir_var_shader_in ? state->new_distance_in_var : state->new_distance_out_var;
lower_distance_deref(state, b, intr, deref, new_var);
@@ -397,7 +396,6 @@ nir_lower_clip_cull_distance_to_vec4s(nir_shader *shader)
shader->info.stage == MESA_SHADER_COMPUTE)
continue;
if (var->data.location == VARYING_SLOT_CLIP_DIST0)
clip_size = MAX2(clip_size, get_unwrapped_array_length(shader, var));
@@ -423,7 +421,7 @@ nir_lower_clip_cull_distance_to_vec4s(nir_shader *shader)
state.old_distance_out_var = NULL;
state.old_distance_in_var = NULL;
state.in_name ="gl_CullDistance";
state.in_name = "gl_CullDistance";
state.offset = clip_size;
lower_distance_to_vec4(shader, &state);
@@ -515,8 +513,8 @@ nir_lower_clip_cull_distance_arrays(nir_shader *nir)
if (progress) {
nir_metadata_preserve(impl,
nir_metadata_control_flow |
nir_metadata_live_defs |
nir_metadata_loop_analysis);
nir_metadata_live_defs |
nir_metadata_loop_analysis);
} else {
nir_metadata_preserve(impl, nir_metadata_all);
}
src/compiler/nir/nir_lower_fb_read.c
+2 -2
View File
@@ -87,6 +87,6 @@ nir_lower_fb_read(nir_shader *shader)
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
return nir_shader_intrinsics_pass(shader, nir_lower_fb_read_instr,
nir_metadata_control_flow,
NULL);
nir_metadata_control_flow,
NULL);
}
src/compiler/nir/nir_lower_flatshade.c
+2 -1
View File
@@ -37,7 +37,8 @@ static bool
lower_input_io(nir_builder *b, nir_intrinsic_instr *intr, void *data)
{
if (intr->intrinsic != nir_intrinsic_load_interpolated_input)
return false;;
return false;
;
nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
if (!check_location(sem.location))
return false;
src/compiler/nir/nir_lower_gs_intrinsics.c
+3 -4
View File
@@ -137,8 +137,7 @@ rewrite_emit_vertex(nir_intrinsic_instr *intrin, struct state *state)
if (state->count_decomposed_prims) {
nir_variable *vtx_var = state->vtxcnt_per_prim_vars[stream];
nir_def *vtx_per_prim_cnt = state->is_points ? nir_imm_int(b, 1) :
nir_load_var(b, vtx_var);
nir_def *vtx_per_prim_cnt = state->is_points ? nir_imm_int(b, 1) : nir_load_var(b, vtx_var);
/* We form a new primitive for every vertex emitted after the first
* complete primitive (since we're outputting strips).
@@ -395,7 +394,7 @@ append_end_primitive(nir_block *end_block, struct state *state)
* but before any jump instructions (return).
*/
set_foreach(end_block->predecessors, entry) {
nir_block *pred = (nir_block *) entry->key;
nir_block *pred = (nir_block *)entry->key;
b->cursor = nir_after_block_before_jump(pred);
nir_end_primitive(b);
@@ -510,7 +509,7 @@ nir_lower_gs_intrinsics(nir_shader *shader, nir_lower_gs_intrinsics_flags option
nir_local_variable_create(impl, glsl_uint_type(), "decomposed_primitive_count");
/* initialize to 0 */
nir_store_var(&b, state.decomposed_primitive_count_vars[i],
nir_imm_int(&b, 0), 0x1);
nir_imm_int(&b, 0), 0x1);
}
} else {
/* If per_stream is false, we only have one counter of each kind which we
src/compiler/nir/nir_lower_helper_writes.c
+1 -1
View File
@@ -104,5 +104,5 @@ nir_lower_helper_writes(nir_shader *shader, bool lower_plain_stores)
{
assert(shader->info.stage == MESA_SHADER_FRAGMENT);
return nir_shader_intrinsics_pass(shader, lower, nir_metadata_none,
&lower_plain_stores);
&lower_plain_stores);
}
src/compiler/nir/nir_lower_image_atomics_to_global.c
+3 -2
View File
@@ -111,9 +111,10 @@ nir_lower_image_atomics_to_global(nir_shader *shader,
const void *data)
{
struct lower_state state = {
.filter = filter, .data = data,
.filter = filter,
.data = data,
};
return nir_shader_intrinsics_pass(shader, lower,
nir_metadata_control_flow,
(void *) &state);
(void *)&state);
}
src/compiler/nir/nir_lower_input_attachments.c
+1 -3
View File
@@ -43,9 +43,7 @@ load_frag_coord(nir_builder *b, nir_deref_instr *deref,
frag_coord = nir_bcsel(b, unscaled, unscaled_frag_coord, frag_coord);
} else {
assert(deref->deref_type == nir_deref_type_var);
bool unscaled = base == NIR_VARIABLE_NO_INDEX ?
options->unscaled_depth_stencil_ir3 :
((options->unscaled_input_attachment_ir3 >> base) & 1);
bool unscaled = base == NIR_VARIABLE_NO_INDEX ? options->unscaled_depth_stencil_ir3 : ((options->unscaled_input_attachment_ir3 >> base) & 1);
frag_coord = unscaled ? unscaled_frag_coord : frag_coord;
}
}
src/compiler/nir/nir_lower_io.c
+10 -11
View File
@@ -51,7 +51,7 @@ add_variable_name(struct lower_io_state *state, const char *name)
bool found = false;
struct set_entry *entry = _mesa_set_search_or_add(&state->variable_names, name, &found);
if (!found)
entry->key = (void*)ralloc_strdup(state->builder.shader, name);
entry->key = (void *)ralloc_strdup(state->builder.shader, name);
return entry->key;
}
@@ -3060,7 +3060,7 @@ is_dual_slot(nir_intrinsic_instr *intrin)
}
return intrin->def.bit_size == 64 &&
intrin->def.num_components >= 3;
intrin->def.num_components >= 3;
}
/**
@@ -3340,8 +3340,8 @@ nir_lower_io_passes(nir_shader *nir, bool renumber_vs_inputs)
if (!has_indirect_inputs || !has_indirect_outputs) {
NIR_PASS(_, nir, nir_lower_io_to_temporaries,
nir_shader_get_entrypoint(nir), !has_indirect_outputs,
!has_indirect_inputs);
nir_shader_get_entrypoint(nir), !has_indirect_outputs,
!has_indirect_inputs);
/* We need to lower all the copy_deref's introduced by lower_io_to-
* _temporaries before calling nir_lower_io.
@@ -3356,7 +3356,8 @@ nir_lower_io_passes(nir_shader *nir, bool renumber_vs_inputs)
if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
NIR_PASS(_, nir, nir_lower_indirect_derefs,
(!has_indirect_inputs ? nir_var_shader_in : 0) |
(!has_indirect_outputs ? nir_var_shader_out : 0), UINT32_MAX);
(!has_indirect_outputs ? nir_var_shader_out : 0),
UINT32_MAX);
}
}
@@ -3365,10 +3366,9 @@ nir_lower_io_passes(nir_shader *nir, bool renumber_vs_inputs)
* would break 64-bit vertex attribs for GLSL.
*/
NIR_PASS(_, nir, nir_lower_io, nir_var_shader_out | nir_var_shader_in,
type_size_vec4,
(renumber_vs_inputs ? nir_lower_io_lower_64bit_to_32_new :
nir_lower_io_lower_64bit_to_32) |
nir_lower_io_use_interpolated_input_intrinsics);
type_size_vec4,
(renumber_vs_inputs ? nir_lower_io_lower_64bit_to_32_new : nir_lower_io_lower_64bit_to_32) |
nir_lower_io_use_interpolated_input_intrinsics);
/* nir_io_add_const_offset_to_base needs actual constants. */
NIR_PASS(_, nir, nir_opt_constant_folding);
@@ -3393,8 +3393,7 @@ nir_lower_io_passes(nir_shader *nir, bool renumber_vs_inputs)
* This must be done after DCE to remove dead load_input intrinsics.
*/
NIR_PASS(_, nir, nir_recompute_io_bases,
(nir->info.stage != MESA_SHADER_VERTEX || renumber_vs_inputs ?
nir_var_shader_in : 0) | nir_var_shader_out);
(nir->info.stage != MESA_SHADER_VERTEX || renumber_vs_inputs ? nir_var_shader_in : 0) | nir_var_shader_out);
if (nir->xfb_info)
NIR_PASS(_, nir, nir_io_add_intrinsic_xfb_info);
src/compiler/nir/nir_lower_io_to_vector.c
+7 -7
View File
@@ -564,11 +564,11 @@ nir_lower_io_to_vector_impl(nir_function_impl *impl, nir_variable_mode modes)
if (new_frac + c >= old_frac &&
(old_wrmask & 1 << (new_frac + c - old_frac))) {
comps[c] = nir_get_scalar(old_value,
new_frac + c - old_frac);
new_frac + c - old_frac);
} else {
comps[c] = nir_get_scalar(nir_undef(&b, old_value->num_components,
old_value->bit_size),
0);
old_value->bit_size),
0);
}
}
nir_def *new_value = nir_vec_scalars(&b, comps, intrin->num_components);
@@ -619,7 +619,7 @@ static bool
is_tess_level_variable(nir_variable *var)
{
return var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER ||
var->data.location == VARYING_SLOT_TESS_LEVEL_INNER;
var->data.location == VARYING_SLOT_TESS_LEVEL_INNER;
}
/* Make the tess factor variables vectors instead of compact arrays, so accesses
@@ -650,9 +650,9 @@ nir_vectorize_tess_levels(nir_shader *shader)
nir_lower_array_deref_of_vec(shader, mode, is_tess_level_variable,
nir_lower_direct_array_deref_of_vec_load |
nir_lower_indirect_array_deref_of_vec_load |
nir_lower_direct_array_deref_of_vec_store |
nir_lower_indirect_array_deref_of_vec_store);
nir_lower_indirect_array_deref_of_vec_load |
nir_lower_direct_array_deref_of_vec_store |
nir_lower_indirect_array_deref_of_vec_store);
/* Remove dead array deref instructions to avoid nir_validate() complain
* array_deref on vector variable.
src/compiler/nir/nir_lower_mediump.c
+3 -3
View File
@@ -129,12 +129,12 @@ nir_recompute_io_bases(nir_shader *nir, nir_variable_mode modes)
if (intr->intrinsic == nir_intrinsic_load_per_primitive_input) {
nir_intrinsic_set_base(intr,
num_normal_inputs +
BITSET_PREFIX_SUM(per_prim_inputs, sem.location));
BITSET_PREFIX_SUM(per_prim_inputs, sem.location));
} else {
nir_intrinsic_set_base(intr,
BITSET_PREFIX_SUM(inputs, sem.location) +
BITSET_PREFIX_SUM(dual_slot_inputs, sem.location) +
(sem.high_dvec2 ? 1 : 0));
BITSET_PREFIX_SUM(dual_slot_inputs, sem.location) +
(sem.high_dvec2 ? 1 : 0));
}
} else if (sem.dual_source_blend_index) {
nir_intrinsic_set_base(intr,
src/compiler/nir/nir_lower_non_uniform_access.c
+1 -1
View File
@@ -324,7 +324,7 @@ nir_lower_non_uniform_access_impl(nir_function_impl *impl,
case nir_intrinsic_demote:
case nir_intrinsic_barrier:
handle_barrier(&state, intrin->intrinsic == nir_intrinsic_terminate_if ||
intrin->intrinsic == nir_intrinsic_terminate);
intrin->intrinsic == nir_intrinsic_terminate);
break;
case nir_intrinsic_load_ubo:
src/compiler/nir/nir_lower_packing.c
+13 -13
View File
@@ -100,7 +100,7 @@ lower_pack_32_from_8(nir_builder *b, nir_def *src)
return nir_ior(b,
nir_ior(b,
nir_channel(b, src32, 0) ,
nir_channel(b, src32, 0),
nir_ishl_imm(b, nir_channel(b, src32, 1), 8)),
nir_ior(b,
nir_ishl_imm(b, nir_channel(b, src32, 2), 16),
@@ -116,15 +116,15 @@ lower_unpack_32_to_8(nir_builder *b, nir_def *src)
* instructions when the lowering flag is set.
*/
if (b->shader->options->lower_extract_byte) {
return nir_vec4(b, nir_u2u8(b, src ),
nir_u2u8(b, nir_ushr_imm(b, src, 8)),
nir_u2u8(b, nir_ushr_imm(b, src, 16)),
nir_u2u8(b, nir_ushr_imm(b, src, 24)));
return nir_vec4(b, nir_u2u8(b, src),
nir_u2u8(b, nir_ushr_imm(b, src, 8)),
nir_u2u8(b, nir_ushr_imm(b, src, 16)),
nir_u2u8(b, nir_ushr_imm(b, src, 24)));
} else {
return nir_vec4(b, nir_u2u8(b, nir_extract_u8_imm(b, src, 0)),
nir_u2u8(b, nir_extract_u8_imm(b, src, 1)),
nir_u2u8(b, nir_extract_u8_imm(b, src, 2)),
nir_u2u8(b, nir_extract_u8_imm(b, src, 3)));
nir_u2u8(b, nir_extract_u8_imm(b, src, 1)),
nir_u2u8(b, nir_extract_u8_imm(b, src, 2)),
nir_u2u8(b, nir_extract_u8_imm(b, src, 3)));
}
}
@@ -168,14 +168,14 @@ lower_pack_instr(nir_builder *b, nir_alu_instr *alu_instr, void *data)
typedef nir_def *(*lower_func_t)(nir_builder *b, nir_def *src);
static const lower_func_t lower_funcs[nir_lower_packing_num_ops] = {
[nir_lower_packing_op_pack_64_2x32] = lower_pack_64_from_32,
[nir_lower_packing_op_pack_64_2x32] = lower_pack_64_from_32,
[nir_lower_packing_op_unpack_64_2x32] = lower_unpack_64_to_32,
[nir_lower_packing_op_pack_64_4x16] = lower_pack_64_from_16,
[nir_lower_packing_op_pack_64_4x16] = lower_pack_64_from_16,
[nir_lower_packing_op_unpack_64_4x16] = lower_unpack_64_to_16,
[nir_lower_packing_op_pack_32_2x16] = lower_pack_32_from_16,
[nir_lower_packing_op_pack_32_2x16] = lower_pack_32_from_16,
[nir_lower_packing_op_unpack_32_2x16] = lower_unpack_32_to_16,
[nir_lower_packing_op_pack_32_4x8] = lower_pack_32_from_8,
[nir_lower_packing_op_unpack_32_4x8] = lower_unpack_32_to_8,
[nir_lower_packing_op_pack_32_4x8] = lower_pack_32_from_8,
[nir_lower_packing_op_unpack_32_4x8] = lower_unpack_32_to_8,
};
nir_def *src = nir_ssa_for_alu_src(b, alu_instr, 0);
src/compiler/nir/nir_lower_point_smooth.c
+4 -4
View File
@@ -150,8 +150,8 @@ nir_lower_point_smooth(nir_shader *shader, bool set_barycentrics)
};
return nir_shader_intrinsics_pass(shader, lower_point_smooth,
nir_metadata_loop_analysis |
nir_metadata_block_index |
nir_metadata_dominance,
&state);
nir_metadata_loop_analysis |
nir_metadata_block_index |
nir_metadata_dominance,
&state);
}
src/compiler/nir/nir_lower_printf.c
+47 -18
View File
@@ -217,24 +217,53 @@ nir_printf_fmt(nir_builder *b, unsigned ptr_bit_size, const char *fmt, ...)
while ((pos = util_printf_next_spec_pos(fmt, pos)) != -1) {
unsigned arg_size;
switch (fmt[pos]) {
case 'c': arg_size = 1; break;
case 'd': arg_size = 4; break;
case 'e': arg_size = 4; break;
case 'E': arg_size = 4; break;
case 'f': arg_size = 4; break;
case 'F': arg_size = 4; break;
case 'G': arg_size = 4; break;
case 'a': arg_size = 4; break;
case 'A': arg_size = 4; break;
case 'i': arg_size = 4; break;
case 'u': arg_size = 4; break;
case 'x': arg_size = 4; break;
case 'X': arg_size = 4; break;
case 'p': arg_size = 8; break;
default: unreachable("invalid");
case 'c':
arg_size = 1;
break;
case 'd':
arg_size = 4;
break;
case 'e':
arg_size = 4;
break;
case 'E':
arg_size = 4;
break;
case 'f':
arg_size = 4;
break;
case 'F':
arg_size = 4;
break;
case 'G':
arg_size = 4;
break;
case 'a':
arg_size = 4;
break;
case 'A':
arg_size = 4;
break;
case 'i':
arg_size = 4;
break;
case 'u':
arg_size = 4;
break;
case 'x':
arg_size = 4;
break;
case 'X':
arg_size = 4;
break;
case 'p':
arg_size = 8;
break;
default:
unreachable("invalid");
}
ASSERTED nir_def *def = va_arg(ap, nir_def*);
ASSERTED nir_def *def = va_arg(ap, nir_def *);
assert(def->bit_size / 8 == arg_size);
info.num_args++;
@@ -259,7 +288,7 @@ nir_printf_fmt(nir_builder *b, unsigned ptr_bit_size, const char *fmt, ...)
total_size += info.arg_sizes[a];
nir_push_if(b, nir_ilt(b, nir_iadd_imm(b, buffer_offset, total_size),
nir_load_printf_buffer_size(b)));
nir_load_printf_buffer_size(b)));
{
nir_def *identifier = nir_imm_int(b, u_printf_hash(&info));
nir_def *store_addr =
@@ -270,7 +299,7 @@ nir_printf_fmt(nir_builder *b, unsigned ptr_bit_size, const char *fmt, ...)
va_start(ap, fmt);
unsigned store_offset = sizeof(uint32_t);
for (unsigned a = 0; a < info.num_args; a++) {
nir_def *def = va_arg(ap, nir_def*);
nir_def *def = va_arg(ap, nir_def *);
nir_store_global(b, nir_iadd_imm(b, store_addr, store_offset),
4, def, 0x1);
src/compiler/nir/nir_lower_shader_calls.c
+7 -7
View File
@@ -1447,8 +1447,8 @@ static bool
nir_opt_remove_respills(nir_shader *shader)
{
return nir_shader_intrinsics_pass(shader, opt_remove_respills_instr,
nir_metadata_control_flow,
NULL);
nir_metadata_control_flow,
NULL);
}
static void
@@ -1908,8 +1908,8 @@ static bool
nir_split_stack_components(nir_shader *shader)
{
return nir_shader_intrinsics_pass(shader, split_stack_components_instr,
nir_metadata_control_flow,
NULL);
nir_metadata_control_flow,
NULL);
}
struct stack_op_vectorizer_state {
@@ -2016,13 +2016,13 @@ nir_lower_shader_calls(nir_shader *shader,
unsigned start_call_scratch = shader->scratch_size;
NIR_PASS(_, shader, spill_ssa_defs_and_lower_shader_calls,
num_calls, options);
num_calls, options);
NIR_PASS(_, shader, nir_opt_remove_phis);
NIR_PASS(_, shader, nir_opt_trim_stack_values);
NIR_PASS(_, shader, nir_opt_sort_and_pack_stack,
start_call_scratch, options->stack_alignment, num_calls);
start_call_scratch, options->stack_alignment, num_calls);
/* Make N copies of our shader */
nir_shader **resume_shaders = ralloc_array(mem_ctx, nir_shader *, num_calls);
@@ -2085,7 +2085,7 @@ nir_lower_shader_calls(nir_shader *shader,
NIR_PASS(_, resume_shaders[i], nir_opt_load_store_vectorize, &vect_opts);
}
NIR_PASS(_, resume_shaders[i], nir_lower_stack_to_scratch,
options->address_format);
options->address_format);
nir_opt_cse(resume_shaders[i]);
}
src/compiler/nir/nir_lower_single_sampled.c
+2 -2
View File
@@ -115,7 +115,7 @@ nir_lower_single_sampled(nir_shader *shader)
SYSTEM_VALUE_BARYCENTRIC_LINEAR_CENTROID);
return nir_shader_intrinsics_pass(shader, lower_single_sampled_instr,
nir_metadata_control_flow,
NULL) ||
nir_metadata_control_flow,
NULL) ||
progress;
}
src/compiler/nir/nir_lower_subgroups.c
+5 -8
View File
@@ -259,7 +259,7 @@ lower_vote_eq_to_scalar(nir_builder *b, nir_intrinsic_instr *intrin)
nir_def *result = NULL;
for (unsigned i = 0; i < intrin->num_components; i++) {
nir_def* chan = nir_channel(b, value, i);
nir_def *chan = nir_channel(b, value, i);
if (intrin->intrinsic == nir_intrinsic_vote_feq) {
chan = nir_vote_feq(b, intrin->def.bit_size, chan);
@@ -643,10 +643,7 @@ lower_boolean_reduce(nir_builder *b, nir_intrinsic_instr *intrin,
else if (op == nir_op_ior)
return nir_vote_any(b, 1, intrin->src[0].ssa);
else if (op == nir_op_ixor)
return nir_i2b(b, nir_iand_imm(b, vec_bit_count(b, nir_ballot(b,
options->ballot_components,
options->ballot_bit_size,
intrin->src[0].ssa)),
return nir_i2b(b, nir_iand_imm(b, vec_bit_count(b, nir_ballot(b, options->ballot_components, options->ballot_bit_size, intrin->src[0].ssa)),
1));
else
unreachable("bad boolean reduction op");
@@ -944,8 +941,8 @@ build_quad_vote_any(nir_builder *b, nir_def *src,
const nir_lower_subgroups_options *options)
{
nir_def *ballot = nir_ballot(b, options->ballot_components,
options->ballot_bit_size,
src);
options->ballot_bit_size,
src);
nir_def *mask = build_subgroup_quad_mask(b, options);
return nir_ine_imm(b, nir_iand(b, ballot, mask), 0);
@@ -992,7 +989,7 @@ lower_dynamic_quad_broadcast(nir_builder *b, nir_intrinsic_instr *intrin,
for (unsigned i = 0; i < 4; ++i) {
nir_def *qbcst = nir_quad_broadcast(b, intrin->src[0].ssa,
nir_imm_int(b, i));
nir_imm_int(b, i));
if (i)
dst = nir_bcsel(b, nir_ieq_imm(b, intrin->src[1].ssa, i),
src/compiler/nir/nir_lower_system_values.c
+4 -6
View File
@@ -527,9 +527,9 @@ lower_compute_system_value_instr(nir_builder *b,
* this way we don't leave behind extra ALU instrs.
*/
uint32_t wg_size[3] = {b->shader->info.workgroup_size[0],
b->shader->info.workgroup_size[1],
b->shader->info.workgroup_size[2]};
uint32_t wg_size[3] = { b->shader->info.workgroup_size[0],
b->shader->info.workgroup_size[1],
b->shader->info.workgroup_size[2] };
nir_def *val = try_lower_id_to_index_1d(b, local_index, wg_size);
if (val)
return val;
@@ -689,9 +689,7 @@ lower_compute_system_value_instr(nir_builder *b,
nir_def *base_group_id = nir_load_base_workgroup_id(b, bit_size);
nir_def *local_id = nir_load_local_invocation_id(b);
return nir_iadd(b, nir_imul(b, nir_iadd(b, nir_u2uN(b, group_id, bit_size),
base_group_id),
nir_u2uN(b, group_size, bit_size)),
return nir_iadd(b, nir_imul(b, nir_iadd(b, nir_u2uN(b, group_id, bit_size), base_group_id), nir_u2uN(b, group_size, bit_size)),
nir_u2uN(b, local_id, bit_size));
} else if (options && options->global_id_is_32bit && bit_size > 32) {
return nir_u2uN(b, nir_load_global_invocation_id(b, 32), bit_size);
src/compiler/nir/nir_lower_terminate_to_demote.c
+1 -1
View File
@@ -26,7 +26,7 @@ nir_lower_terminate_cf_list(nir_builder *b, struct exec_list *cf_list)
/* Everything after the terminate is dead */
nir_cf_list dead_cf;
nir_cf_extract(&dead_cf, nir_after_instr(&intrin->instr),
nir_after_cf_list(cf_list));
nir_after_cf_list(cf_list));
nir_cf_delete(&dead_cf);
intrin->intrinsic = nir_intrinsic_demote;
src/compiler/nir/nir_lower_tess_coord_z.c
+2 -2
View File
@@ -34,6 +34,6 @@ bool
nir_lower_tess_coord_z(nir_shader *shader, bool triangles)
{
return nir_shader_intrinsics_pass(shader, lower_tess_coord_z,
nir_metadata_control_flow,
&triangles);
nir_metadata_control_flow,
&triangles);
}
src/compiler/nir/nir_lower_two_sided_color.c
-1
View File
@@ -84,7 +84,6 @@ nir_lower_two_sided_color_instr(nir_builder *b, nir_instr *instr, void *data)
} else
return false;
/* replace load_input(COLn) with
* bcsel(load_system_value(FACE), load_input(COLn), load_input(BFCn))
*/
src/compiler/nir/nir_lower_var_copies.c
+2 -2
View File
@@ -138,6 +138,6 @@ nir_lower_var_copies(nir_shader *shader)
shader->info.var_copies_lowered = true;
return nir_shader_intrinsics_pass(shader, lower_var_copies_instr,
nir_metadata_control_flow,
NULL);
nir_metadata_control_flow,
NULL);
}
src/compiler/nir/nir_lower_variable_initializers.c
+1 -4
View File
@@ -206,7 +206,6 @@ nir_zero_initialize_shared_memory(nir_shader *shader,
return true;
}
/** Clears all shared memory to zero at the end of the shader
*
* To easily get to the end of the shader it relies on all exits
@@ -269,9 +268,7 @@ nir_clear_shared_memory(nir_shader *shader,
nir_def_init(&offset_phi->instr, &offset_phi->def, 1, 32);
nir_phi_instr_add_src(offset_phi, nir_cursor_current_block(b.cursor), first_offset);
nir_def *size_per_iteration_def = shader->info.workgroup_size_variable ?
nir_imul_imm(&b, nir_load_workgroup_size(&b), chunk_size) :
nir_imm_int(&b, size_per_iteration);
nir_def *size_per_iteration_def = shader->info.workgroup_size_variable ? nir_imul_imm(&b, nir_load_workgroup_size(&b), chunk_size) : nir_imm_int(&b, size_per_iteration);
nir_def *value = nir_imm_zero(&b, chunk_comps, 32);
nir_loop *loop = nir_push_loop(&b);
src/compiler/nir/nir_lower_viewport_transform.c
+2 -2
View File
@@ -103,6 +103,6 @@ nir_lower_viewport_transform(nir_shader *shader)
assert((shader->info.stage == MESA_SHADER_VERTEX) || (shader->info.stage == MESA_SHADER_GEOMETRY) || (shader->info.stage == MESA_SHADER_TESS_EVAL));
return nir_shader_intrinsics_pass(shader, lower_viewport_transform_instr,
nir_metadata_control_flow,
NULL);
nir_metadata_control_flow,
NULL);
}
src/compiler/nir/nir_lower_wpos_ytransform.c
+2 -2
View File
@@ -102,8 +102,8 @@ emit_wpos_adjustment(lower_wpos_ytransform_state *state,
if (wpos[1]) {
/* Now the conditional y flip: STATE_FB_WPOS_Y_TRANSFORM.xy/zw will be
* inversion/identity, or the other way around if we're drawing to an FBO.
*/
* inversion/identity, or the other way around if we're drawing to an FBO.
*/
unsigned base = invert ? 0 : 2;
/* wpos.y = wpos.y * trans.x/z + trans.y/w */
wpos[1] = nir_ffma(b, wpos[1], nir_channel(b, wpostrans, base),
src/compiler/nir/nir_metadata.c
+2 -1
View File
@@ -168,7 +168,8 @@ nir_metadata_check_validation_flag(nir_shader *shader)
}
}
void nir_metadata_require_all(nir_shader *shader)
void
nir_metadata_require_all(nir_shader *shader)
{
bool force_unroll_sampler_indirect = shader->options->force_indirect_unrolling_sampler;
nir_variable_mode indirect_mask = shader->options->force_indirect_unrolling;
src/compiler/nir/nir_move_output_stores_to_end.c
+3 -4
View File
@@ -11,8 +11,8 @@
#include "nir_builder.h"
/* Put the position in the last slot to make its store last. */
#define LAST_SLOT NUM_TOTAL_VARYING_SLOTS
#define NUM_SLOTS ((LAST_SLOT + 1) * 4)
#define LAST_SLOT NUM_TOTAL_VARYING_SLOTS
#define NUM_SLOTS ((LAST_SLOT + 1) * 4)
typedef struct {
nir_instr *stores[NUM_SLOTS];
@@ -92,7 +92,6 @@ nir_move_output_stores_to_end(nir_shader *nir)
progress = true;
}
nir_metadata_preserve(impl, progress ? nir_metadata_control_flow :
nir_metadata_all);
nir_metadata_preserve(impl, progress ? nir_metadata_control_flow : nir_metadata_all);
return progress;
}
src/compiler/nir/nir_opt_access.c
+4 -4
View File
@@ -280,8 +280,8 @@ opt_access_impl(struct access_state *state,
if (progress) {
nir_metadata_preserve(impl,
nir_metadata_control_flow |
nir_metadata_live_defs |
nir_metadata_loop_analysis);
nir_metadata_live_defs |
nir_metadata_loop_analysis);
}
return progress;
@@ -326,8 +326,8 @@ nir_opt_access(nir_shader *shader, const nir_opt_access_options *options)
if (var_progress) {
nir_metadata_preserve(impl,
nir_metadata_control_flow |
nir_metadata_live_defs |
nir_metadata_loop_analysis);
nir_metadata_live_defs |
nir_metadata_loop_analysis);
}
}
src/compiler/nir/nir_opt_barriers.c
+6 -5
View File
@@ -21,9 +21,9 @@
* IN THE SOFTWARE.
*/
#include "util/u_vector.h"
#include "nir.h"
#include "nir_worklist.h"
#include "util/u_vector.h"
static bool
combine_all_barriers(nir_intrinsic_instr *a, nir_intrinsic_instr *b, void *_)
@@ -166,7 +166,8 @@ nir_opt_barrier_modes_impl(nir_function_impl *impl)
* need to keep the mode. Any modes not kept are discarded.
*/
nir_deref_instr **p_deref;
u_vector_foreach(p_deref, &mem_derefs) {
u_vector_foreach(p_deref, &mem_derefs)
{
nir_deref_instr *deref = *p_deref;
const unsigned atomic_mode =
glsl_contains_atomic(deref->type) ? nir_var_mem_ssbo : 0;
@@ -190,7 +191,7 @@ nir_opt_barrier_modes_impl(nir_function_impl *impl)
if (nir_intrinsic_execution_scope(barrier) == SCOPE_NONE &&
new_modes == nir_var_mem_shared) {
nir_intrinsic_set_memory_scope(barrier,
MIN2(nir_intrinsic_memory_scope(barrier), SCOPE_WORKGROUP));
MIN2(nir_intrinsic_memory_scope(barrier), SCOPE_WORKGROUP));
progress = true;
}
}
@@ -232,11 +233,11 @@ nir_opt_barrier_modes(nir_shader *shader)
nir_foreach_function_impl(impl, shader) {
nir_metadata_require(impl, nir_metadata_dominance |
nir_metadata_instr_index);
nir_metadata_instr_index);
if (nir_opt_barrier_modes_impl(impl)) {
nir_metadata_preserve(impl, nir_metadata_control_flow |
nir_metadata_live_defs);
nir_metadata_live_defs);
progress = true;
} else {
nir_metadata_preserve(impl, nir_metadata_all);
src/compiler/nir/nir_opt_cse.c
+1 -1
View File
@@ -21,8 +21,8 @@
* IN THE SOFTWARE.
*/
#include "nir_instr_set.h"
#include "nir.h"
#include "nir_instr_set.h"
/*
* Implements common subexpression elimination
src/compiler/nir/nir_opt_load_store_vectorize.c
+11 -9
View File
@@ -593,8 +593,7 @@ create_entry(void *mem_ctx,
entry->info = info;
entry->is_store = entry->info->value_src >= 0;
entry->num_components =
entry->is_store ? intrin->num_components :
nir_def_last_component_read(&intrin->def) + 1;
entry->is_store ? intrin->num_components : nir_def_last_component_read(&intrin->def) + 1;
if (entry->info->deref_src >= 0) {
entry->deref = nir_src_as_deref(intrin->src[entry->info->deref_src]);
@@ -789,11 +788,11 @@ vectorize_loads(nir_builder *b, struct vectorize_ctx *ctx,
nir_def *high_undef = nir_undef(b, old_high_num_components, old_high_bit_size);
nir_def *low_def = nir_extract_bits(
b, (nir_def*[]){data, low_undef}, 2, 0, old_low_num_components,
b, (nir_def *[]){ data, low_undef }, 2, 0, old_low_num_components,
old_low_bit_size);
nir_def *high_def = nir_extract_bits(
b, (nir_def*[]){data, high_undef}, 2, high_start,
b, (nir_def *[]){ data, high_undef }, 2, high_start,
old_high_num_components, old_high_bit_size);
/* convert booleans */
@@ -1400,8 +1399,10 @@ vectorize_sorted_entries(struct vectorize_ctx *ctx, nir_function_impl *impl,
*/
unsigned max_hole =
first->is_store ||
(ctx->options->has_shared2_amd &&
get_variable_mode(first) == nir_var_mem_shared) ? 0 : 28;
(ctx->options->has_shared2_amd &&
get_variable_mode(first) == nir_var_mem_shared)
? 0
: 28;
unsigned low_size = get_bit_size(low) / 8u * low->num_components;
bool separate = diff > max_hole + low_size;
@@ -1627,7 +1628,7 @@ nir_opt_load_store_vectorize(nir_shader *shader, const nir_load_store_vectorize_
nir_metadata_preserve(impl,
nir_metadata_control_flow |
nir_metadata_live_defs);
nir_metadata_live_defs);
}
ralloc_free(ctx);
@@ -1659,6 +1660,7 @@ nir_opt_load_store_update_alignments(nir_shader *shader)
return nir_shader_intrinsics_pass(shader,
opt_load_store_update_alignments_callback,
nir_metadata_control_flow |
nir_metadata_live_defs |
nir_metadata_instr_index, NULL);
nir_metadata_live_defs |
nir_metadata_instr_index,
NULL);
}
src/compiler/nir/nir_opt_loop.c
+3 -6
View File
@@ -510,9 +510,7 @@ merge_terminators(nir_builder *b, nir_if *dest_if, nir_if *src_if)
* moves the break later.
*/
bool then_break = nir_block_ends_in_break(nir_if_last_then_block(src_if));
nir_cursor continue_blk_c = then_break ?
nir_after_block(nir_if_last_else_block(src_if)) :
nir_after_block(nir_if_last_then_block(src_if));
nir_cursor continue_blk_c = then_break ? nir_after_block(nir_if_last_else_block(src_if)) : nir_after_block(nir_if_last_then_block(src_if));
nir_cf_list tmp;
nir_cursor after_src_if = nir_after_cf_node(&src_if->cf_node);
@@ -520,8 +518,7 @@ merge_terminators(nir_builder *b, nir_if *dest_if, nir_if *src_if)
nir_cf_reinsert(&tmp, continue_blk_c);
/* Remove the break from the src if-statement */
nir_block *break_blk = then_break ?
nir_if_last_then_block(src_if) : nir_if_last_else_block(src_if);
nir_block *break_blk = then_break ? nir_if_last_then_block(src_if) : nir_if_last_else_block(src_if);
nir_instr_remove(nir_block_last_instr(break_blk));
/* Add phis if needed after we moved instructions to the src if-statements
@@ -568,7 +565,7 @@ is_basic_terminator_if(nir_if *nif)
if (!nir_block_ends_in_break(last_then) &&
!nir_block_ends_in_break(last_else))
return false;
return false;
if (nir_block_ends_in_break(last_then)) {
if (!exec_list_is_empty(&last_else->instr_list) ||
src/compiler/nir/nir_opt_move_discards_to_top.c
+1 -1
View File
@@ -261,7 +261,7 @@ opt_move_discards_to_top_impl(nir_function_impl *impl)
instr->pass_flags = STOP_PROCESSING_INSTR_FLAG;
goto break_all;
}
FALLTHROUGH;
FALLTHROUGH;
case nir_intrinsic_demote_if:
try_move_discard(intrin, &next_discard_id);
break;
src/compiler/nir/nir_opt_rematerialize_compares.c
+1 -1
View File
@@ -125,7 +125,7 @@ all_uses_are_compare_with_zero(const nir_alu_instr *instr)
return false;
if (!all_uses_are_bcsel(alu))
return false;
return false;
}
return true;
src/compiler/nir/nir_opt_undef.c
+14 -14
View File
@@ -21,10 +21,10 @@
* IN THE SOFTWARE.
*/
#include <math.h>
#include "util/mesa-blake3.h"
#include "nir.h"
#include "nir_builder.h"
#include "util/mesa-blake3.h"
#include <math.h>
/** @file nir_opt_undef.c
*
@@ -251,7 +251,7 @@ replace_ssa_undef(nir_builder *b, nir_instr *instr, void *data)
const struct undef_options *options = data;
nir_undef_instr *undef = nir_instr_as_undef(instr);
struct visit_info info = {0};
struct visit_info info = { 0 };
nir_foreach_use_including_if(src, &undef->def) {
visit_undef_use(src, &info);
@@ -297,7 +297,7 @@ opt_undef_uses(nir_builder *b, nir_instr *instr, void *data)
bool
nir_opt_undef(nir_shader *shader)
{
struct undef_options options = {0};
struct undef_options options = { 0 };
/* Disallow the undef->NaN transformation only for those shaders where
* it's known to break rendering. These are shader source BLAKE3s printed by
@@ -305,20 +305,20 @@ nir_opt_undef(nir_shader *shader)
*/
uint32_t shader_blake3s[][BLAKE3_OUT_LEN32] = {
/* gputest/gimark */
{0x582c214b, 0x25478275, 0xc9a835d2, 0x95c9b643, 0x69deae47, 0x213c7427, 0xa9da66a5, 0xac254ed2},
{ 0x582c214b, 0x25478275, 0xc9a835d2, 0x95c9b643, 0x69deae47, 0x213c7427, 0xa9da66a5, 0xac254ed2 },
/* Viewperf13/CATIA_car_01 */
{0x880dfa0f, 0x60e32201, 0xe3a89f59, 0xb1cc6f07, 0xcdbebe66, 0x20122aec, 0x83450d4e, 0x8f42843d}, /* Taillights */
{0x624e53bb, 0x8eb635ba, 0xb1e4ed9b, 0x651b0fec, 0x86fcf79a, 0xde0863fb, 0x09ce80c1, 0xd972e40f}, /* Grill */
{0x01a8db39, 0xfa175175, 0x621f7302, 0xfcde9177, 0x72d873bf, 0x048d38c1, 0xe669d2de, 0xaa6584af}, /* Headlights */
{0x32029770, 0xab295b41, 0x3f1daf07, 0x9dd9153e, 0xd598be73, 0xe555b2f3, 0x6e087eaf, 0x084d329c}, /* Rims */
{ 0x880dfa0f, 0x60e32201, 0xe3a89f59, 0xb1cc6f07, 0xcdbebe66, 0x20122aec, 0x83450d4e, 0x8f42843d }, /* Taillights */
{ 0x624e53bb, 0x8eb635ba, 0xb1e4ed9b, 0x651b0fec, 0x86fcf79a, 0xde0863fb, 0x09ce80c1, 0xd972e40f }, /* Grill */
{ 0x01a8db39, 0xfa175175, 0x621f7302, 0xfcde9177, 0x72d873bf, 0x048d38c1, 0xe669d2de, 0xaa6584af }, /* Headlights */
{ 0x32029770, 0xab295b41, 0x3f1daf07, 0x9dd9153e, 0xd598be73, 0xe555b2f3, 0x6e087eaf, 0x084d329c }, /* Rims */
/* Viewperf13/CATIA_car_04 */
{0x55207b90, 0x08fa2f8f, 0x9db62464, 0xadba6570, 0xb6d5d962, 0xf434bff5, 0x46a34d64, 0x021bfb45}, /* Headlights */
{0x83fbdd6a, 0x231b027e, 0x6f142248, 0x2b3045de, 0xd2a4f460, 0x59dfb8d8, 0x6dbc00f9, 0xcca13143}, /* Rims */
{0x88ed3a0a, 0xf128d384, 0x8161fdac, 0xd10cb257, 0x5e63db2d, 0x56798b6f, 0x881e81ee, 0xa4e937d4}, /* Tires */
{0xbf84697c, 0x3bc75bb6, 0x9d012175, 0x2dd90bcf, 0x0562f0ed, 0x5aa80e62, 0xb5793ae3, 0x9127bcab}, /* Windows */
{0x47a3eb4b, 0x136f676d, 0x94045ed3, 0x57b00972, 0x8cda7550, 0x88327fda, 0x37f7cf37, 0x66db05e3}, /* Body */
{ 0x55207b90, 0x08fa2f8f, 0x9db62464, 0xadba6570, 0xb6d5d962, 0xf434bff5, 0x46a34d64, 0x021bfb45 }, /* Headlights */
{ 0x83fbdd6a, 0x231b027e, 0x6f142248, 0x2b3045de, 0xd2a4f460, 0x59dfb8d8, 0x6dbc00f9, 0xcca13143 }, /* Rims */
{ 0x88ed3a0a, 0xf128d384, 0x8161fdac, 0xd10cb257, 0x5e63db2d, 0x56798b6f, 0x881e81ee, 0xa4e937d4 }, /* Tires */
{ 0xbf84697c, 0x3bc75bb6, 0x9d012175, 0x2dd90bcf, 0x0562f0ed, 0x5aa80e62, 0xb5793ae3, 0x9127bcab }, /* Windows */
{ 0x47a3eb4b, 0x136f676d, 0x94045ed3, 0x57b00972, 0x8cda7550, 0x88327fda, 0x37f7cf37, 0x66db05e3 }, /* Body */
};
for (unsigned i = 0; i < ARRAY_SIZE(shader_blake3s); i++) {
src/compiler/nir/nir_opt_uniform_subgroup.c
+7 -8
View File
@@ -39,7 +39,7 @@ opt_uniform_subgroup_filter(const nir_instr *instr, const void *_state)
if (nir_src_is_divergent(&intrin->src[0]))
return false;
const nir_op reduction_op = (nir_op) nir_intrinsic_reduction_op(intrin);
const nir_op reduction_op = (nir_op)nir_intrinsic_reduction_op(intrin);
switch (reduction_op) {
case nir_op_iadd:
@@ -87,11 +87,11 @@ count_active_invocations(nir_builder *b, nir_def *value, bool inclusive,
* count plus one.
*/
if (has_mbcnt_amd) {
return nir_mbcnt_amd(b, value, nir_imm_int(b, (int) inclusive));
return nir_mbcnt_amd(b, value, nir_imm_int(b, (int)inclusive));
} else {
nir_def *mask = inclusive
? nir_load_subgroup_le_mask(b, 1, 32)
: nir_load_subgroup_lt_mask(b, 1, 32);
? nir_load_subgroup_le_mask(b, 1, 32)
: nir_load_subgroup_lt_mask(b, 1, 32);
return nir_bit_count(b, nir_iand(b, value, mask));
}
@@ -100,13 +100,13 @@ count_active_invocations(nir_builder *b, nir_def *value, bool inclusive,
static nir_def *
opt_uniform_subgroup_instr(nir_builder *b, nir_instr *instr, void *_state)
{
const nir_lower_subgroups_options *options = (nir_lower_subgroups_options *) _state;
const nir_lower_subgroups_options *options = (nir_lower_subgroups_options *)_state;
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
if (intrin->intrinsic == nir_intrinsic_reduce ||
intrin->intrinsic == nir_intrinsic_inclusive_scan ||
intrin->intrinsic == nir_intrinsic_exclusive_scan) {
const nir_op reduction_op = (nir_op) nir_intrinsic_reduction_op(intrin);
const nir_op reduction_op = (nir_op)nir_intrinsic_reduction_op(intrin);
if (reduction_op == nir_op_iadd ||
reduction_op == nir_op_fadd ||
@@ -156,8 +156,7 @@ nir_opt_uniform_subgroup(nir_shader *shader,
bool progress = nir_shader_lower_instructions(shader,
opt_uniform_subgroup_filter,
opt_uniform_subgroup_instr,
(void *) options);
(void *)options);
return progress;
}
src/compiler/nir/nir_opt_varyings.c
+139 -161
View File
@@ -493,11 +493,11 @@
* TODO: not implemented, mention the pass that implements it
*/
#include "nir.h"
#include "nir_builder.h"
#include "util/hash_table.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "nir.h"
#include "nir_builder.h"
/* nir_opt_varyings works at scalar 16-bit granularity across all varyings.
*
@@ -505,7 +505,7 @@
* Slots (i % 8 == 1,3,5,7) are high bits of 16-bit channels. 32-bit channels
* don't set these slots as used in bitmasks.
*/
#define NUM_SCALAR_SLOTS (NUM_TOTAL_VARYING_SLOTS * 8)
#define NUM_SCALAR_SLOTS (NUM_TOTAL_VARYING_SLOTS * 8)
/* Fragment shader input slots can be packed with indirectly-indexed vec4
* slots if there are unused components, but only if the vec4 slot has
@@ -596,8 +596,8 @@ get_scalar_16bit_slot(nir_io_semantics sem, unsigned component)
static unsigned
intr_get_scalar_16bit_slot(nir_intrinsic_instr *intr)
{
return get_scalar_16bit_slot(nir_intrinsic_io_semantics(intr),
nir_intrinsic_component(intr));
return get_scalar_16bit_slot(nir_intrinsic_io_semantics(intr),
nir_intrinsic_component(intr));
}
static unsigned
@@ -640,7 +640,7 @@ struct scalar_slot {
/* The result of TES input interpolation. */
nir_alu_instr *tes_interp_load;
unsigned tes_interp_mode; /* FLAG_INTERP_TES_* */
unsigned tes_interp_mode; /* FLAG_INTERP_TES_* */
nir_def *tes_load_tess_coord;
} consumer;
@@ -819,7 +819,8 @@ print_linkage(struct linkage_info *linkage)
printf(" %7s.%c.%s: num_slots=%2u%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
gl_varying_slot_name_for_stage(vec4_slot(i),
linkage->producer_stage) + 13,
linkage->producer_stage) +
13,
"xyzw"[(i / 2) % 4],
i % 2 ? "hi" : "lo",
slot->num_slots,
@@ -1049,11 +1050,11 @@ is_sysval(nir_instr *instr, gl_system_value sysval)
return true;
if (intr->intrinsic == nir_intrinsic_load_deref) {
nir_deref_instr *deref =
nir_deref_instr *deref =
nir_instr_as_deref(intr->src[0].ssa->parent_instr);
return nir_deref_mode_is_one_of(deref, nir_var_system_value) &&
nir_deref_instr_get_variable(deref)->data.location == sysval;
return nir_deref_mode_is_one_of(deref, nir_var_system_value) &&
nir_deref_instr_get_variable(deref)->data.location == sysval;
}
}
@@ -1146,11 +1147,11 @@ can_remove_varying(struct linkage_info *linkage, gl_varying_slot location)
}
struct opt_options {
bool propagate_uniform_expr:1;
bool deduplicate:1;
bool inter_shader_code_motion:1;
bool compact:1;
bool disable_all:1;
bool propagate_uniform_expr : 1;
bool deduplicate : 1;
bool inter_shader_code_motion : 1;
bool compact : 1;
bool disable_all : 1;
};
/**
@@ -1439,8 +1440,7 @@ gather_inputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_d
BITSET_CLEAR(linkage->color32_qual_masks[COLOR_CENTROID], slot);
} else {
INTERP_QUAL_BITSET *bitsets =
intr->def.bit_size == 32 ? &linkage->interp_fp32_qual_masks :
&linkage->interp_fp16_qual_masks;
intr->def.bit_size == 32 ? &linkage->interp_fp32_qual_masks : &linkage->interp_fp16_qual_masks;
if (BITSET_TEST((*bitsets)[PERSP_CENTROID], slot) &&
(BITSET_TEST((*bitsets)[PERSP_PIXEL], slot) ||
@@ -1505,7 +1505,7 @@ gather_outputs(struct nir_builder *builder, nir_intrinsic_instr *intr, void *cb_
assert(intr->src[0].ssa->num_components == 1);
/* nit_opt_undef is required before this. */
assert(intr->src[0].ssa->parent_instr->type !=
nir_instr_type_undef);
nir_instr_type_undef);
} else {
/* nir_lower_io_to_scalar is required before this */
assert(intr->def.num_components == 1);
@@ -1977,8 +1977,7 @@ remove_dead_varyings(struct linkage_info *linkage,
!list_is_empty(&slot->producer.loads) &&
list_is_empty(&slot->consumer.loads)) {
for (unsigned list_index = 0; list_index < 2; list_index++) {
struct list_head *list = list_index ? &slot->producer.stores :
&slot->producer.loads;
struct list_head *list = list_index ? &slot->producer.stores : &slot->producer.loads;
list_for_each_entry(struct list_node, iter, list, head) {
nir_io_semantics sem = nir_intrinsic_io_semantics(iter->instr);
@@ -2034,10 +2033,8 @@ remove_dead_varyings(struct linkage_info *linkage,
* corresponding TCS stores.
*/
for (unsigned list_index = 0; list_index < 2; list_index++) {
struct list_head *list = list_index ? &slot->producer.loads :
&slot->consumer.loads;
nir_builder *b = list_index ? &linkage->producer_builder :
&linkage->consumer_builder;
struct list_head *list = list_index ? &slot->producer.loads : &slot->consumer.loads;
nir_builder *b = list_index ? &linkage->producer_builder : &linkage->consumer_builder;
list_for_each_entry(struct list_node, iter, list, head) {
nir_intrinsic_instr *loadi = iter->instr;
@@ -2065,8 +2062,7 @@ remove_dead_varyings(struct linkage_info *linkage,
nir_def_replace(&loadi->def, replacement);
*progress |= list_index ? nir_progress_producer :
nir_progress_consumer;
*progress |= list_index ? nir_progress_producer : nir_progress_consumer;
}
}
@@ -2089,25 +2085,25 @@ remove_dead_varyings(struct linkage_info *linkage,
******************************************************************/
/* Pass flags for inter-shader code motion. Also used by helpers. */
#define FLAG_ALU_IS_TES_INTERP_LOAD BITFIELD_BIT(0)
#define FLAG_MOVABLE BITFIELD_BIT(1)
#define FLAG_UNMOVABLE BITFIELD_BIT(2)
#define FLAG_POST_DOMINATOR_PROCESSED BITFIELD_BIT(3)
#define FLAG_GATHER_LOADS_VISITED BITFIELD_BIT(4)
#define FLAG_ALU_IS_TES_INTERP_LOAD BITFIELD_BIT(0)
#define FLAG_MOVABLE BITFIELD_BIT(1)
#define FLAG_UNMOVABLE BITFIELD_BIT(2)
#define FLAG_POST_DOMINATOR_PROCESSED BITFIELD_BIT(3)
#define FLAG_GATHER_LOADS_VISITED BITFIELD_BIT(4)
#define FLAG_INTERP_MASK BITFIELD_RANGE(5, 3)
#define FLAG_INTERP_CONVERGENT (0 << 5)
#define FLAG_INTERP_FLAT (1 << 5)
#define FLAG_INTERP_MASK BITFIELD_RANGE(5, 3)
#define FLAG_INTERP_CONVERGENT (0 << 5)
#define FLAG_INTERP_FLAT (1 << 5)
/* FS-only interpolation modes. */
#define FLAG_INTERP_PERSP_PIXEL (2 << 5)
#define FLAG_INTERP_PERSP_CENTROID (3 << 5)
#define FLAG_INTERP_PERSP_SAMPLE (4 << 5)
#define FLAG_INTERP_LINEAR_PIXEL (5 << 5)
#define FLAG_INTERP_LINEAR_CENTROID (6 << 5)
#define FLAG_INTERP_LINEAR_SAMPLE (7 << 5)
#define FLAG_INTERP_PERSP_PIXEL (2 << 5)
#define FLAG_INTERP_PERSP_CENTROID (3 << 5)
#define FLAG_INTERP_PERSP_SAMPLE (4 << 5)
#define FLAG_INTERP_LINEAR_PIXEL (5 << 5)
#define FLAG_INTERP_LINEAR_CENTROID (6 << 5)
#define FLAG_INTERP_LINEAR_SAMPLE (7 << 5)
/* TES-only interpolation modes. (these were found in shaders) */
#define FLAG_INTERP_TES_TRIANGLE_UVW (2 << 5) /* v0*u + v1*v + v2*w */
#define FLAG_INTERP_TES_TRIANGLE_WUV (3 << 5) /* v0*w + v1*u + v2*v */
#define FLAG_INTERP_TES_TRIANGLE_UVW (2 << 5) /* v0*u + v1*v + v2*w */
#define FLAG_INTERP_TES_TRIANGLE_WUV (3 << 5) /* v0*w + v1*u + v2*v */
/* TODO: Feel free to insert more TES interpolation equations here. */
static bool
@@ -2166,8 +2162,7 @@ find_per_vertex_load_for_tes_interp(nir_instr *instr)
case nir_instr_type_intrinsic: {
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
return intr->intrinsic == nir_intrinsic_load_per_vertex_input ?
intr : NULL;
return intr->intrinsic == nir_intrinsic_load_per_vertex_input ? intr : NULL;
}
default:
@@ -2193,7 +2188,9 @@ get_stored_value_for_load(struct linkage_info *linkage, nir_instr *instr)
nir_def *stored_value =
list_first_entry(&linkage->slot[slot_index].producer.stores,
struct list_node, head)->instr->src[0].ssa;
struct list_node, head)
->instr->src[0]
.ssa;
assert(stored_value->num_components == 1);
return stored_value;
}
@@ -2230,7 +2227,7 @@ clone_ssa_impl(struct linkage_info *linkage, nir_builder *b, nir_def *ssa)
return get_stored_value_for_load(linkage, &alu->instr);
}
nir_def *src[4] = {0};
nir_def *src[4] = { 0 };
unsigned num_srcs = nir_op_infos[alu->op].num_inputs;
assert(num_srcs <= ARRAY_SIZE(src));
@@ -2306,7 +2303,7 @@ clone_ssa_impl(struct linkage_info *linkage, nir_builder *b, nir_def *ssa)
nir_deref_instr *parent_orig = nir_deref_instr_parent(deref);
nir_deref_instr *parent_clone =
nir_instr_as_deref(clone_ssa_impl(linkage, b, &parent_orig->def)
->parent_instr);
->parent_instr);
switch (deref->deref_type) {
case nir_deref_type_array: {
@@ -2316,7 +2313,8 @@ clone_ssa_impl(struct linkage_info *linkage, nir_builder *b, nir_def *ssa)
}
case nir_deref_type_struct:
clone = &nir_build_deref_struct(b, parent_clone,
deref->strct.index)->def;
deref->strct.index)
->def;
break;
default:
unreachable("invalid deref type");
@@ -2371,7 +2369,7 @@ static bool
src_is_uniform_expression(nir_src *src, void *data)
{
return is_uniform_expression(src->ssa->parent_instr,
(struct is_uniform_expr_state*)data);
(struct is_uniform_expr_state *)data);
}
/**
@@ -2405,8 +2403,7 @@ is_uniform_expression(nir_instr *instr, struct is_uniform_expr_state *state)
}
if (!instr->pass_flags) {
state->cost += state->linkage->varying_estimate_instr_cost ?
state->linkage->varying_estimate_instr_cost(instr) : 1;
state->cost += state->linkage->varying_estimate_instr_cost ? state->linkage->varying_estimate_instr_cost(instr) : 1;
instr->pass_flags = 1;
return nir_foreach_src(instr, src_is_uniform_expression, state);
}
@@ -2491,10 +2488,8 @@ propagate_uniform_expressions(struct linkage_info *linkage,
/* Replace all loads. Do that for both input and output loads. */
for (unsigned list_index = 0; list_index < 2; list_index++) {
struct list_head *load = list_index ? &slot->producer.loads :
&slot->consumer.loads;
nir_builder *b = list_index ? &linkage->producer_builder :
&linkage->consumer_builder;
struct list_head *load = list_index ? &slot->producer.loads : &slot->consumer.loads;
nir_builder *b = list_index ? &linkage->producer_builder : &linkage->consumer_builder;
list_for_each_entry(struct list_node, node, load, head) {
nir_intrinsic_instr *loadi = node->instr;
@@ -2513,8 +2508,7 @@ propagate_uniform_expressions(struct linkage_info *linkage,
/* Replace the original load. */
nir_def_replace(&loadi->def, clone);
*progress |= list_index ? nir_progress_producer :
nir_progress_consumer;
*progress |= list_index ? nir_progress_producer : nir_progress_consumer;
}
}
@@ -2594,20 +2588,17 @@ get_input_qualifier(struct linkage_info *linkage, unsigned i)
return QUAL_PER_PRIMITIVE;
if (load->intrinsic == nir_intrinsic_load_input_vertex) {
return nir_intrinsic_io_semantics(load).interp_explicit_strict ?
QUAL_EXPLICIT_STRICT : QUAL_EXPLICIT;
return nir_intrinsic_io_semantics(load).interp_explicit_strict ? QUAL_EXPLICIT_STRICT : QUAL_EXPLICIT;
}
assert(load->intrinsic == nir_intrinsic_load_interpolated_input);
nir_instr *baryc_instr = load->src[0].ssa->parent_instr;
nir_intrinsic_instr *baryc = baryc_instr->type == nir_instr_type_intrinsic ?
nir_instr_as_intrinsic(baryc_instr) : NULL;
nir_intrinsic_instr *baryc = baryc_instr->type == nir_instr_type_intrinsic ? nir_instr_as_intrinsic(baryc_instr) : NULL;
if (linkage->has_flexible_interp) {
if (is_color) {
return nir_intrinsic_interp_mode(baryc) == INTERP_MODE_NONE ?
QUAL_COLOR_SHADEMODEL_ANY : QUAL_COLOR_INTERP_ANY;
return nir_intrinsic_interp_mode(baryc) == INTERP_MODE_NONE ? QUAL_COLOR_SHADEMODEL_ANY : QUAL_COLOR_INTERP_ANY;
} else {
return QUAL_VAR_INTERP_ANY;
}
@@ -2662,8 +2653,7 @@ get_input_qualifier(struct linkage_info *linkage, unsigned i)
switch (nir_intrinsic_interp_mode(baryc)) {
case INTERP_MODE_NONE:
qual = is_color ? QUAL_COLOR_SHADEMODEL_PIXEL :
QUAL_VAR_PERSP_PIXEL;
qual = is_color ? QUAL_COLOR_SHADEMODEL_PIXEL : QUAL_VAR_PERSP_PIXEL;
break;
case INTERP_MODE_SMOOTH:
qual = is_color ? QUAL_COLOR_PERSP_PIXEL : QUAL_VAR_PERSP_PIXEL;
@@ -2697,7 +2687,7 @@ static void
deduplicate_outputs(struct linkage_info *linkage,
nir_opt_varyings_progress *progress)
{
struct hash_table *tables[NUM_DEDUP_QUALIFIERS] = {NULL};
struct hash_table *tables[NUM_DEDUP_QUALIFIERS] = { NULL };
unsigned i;
/* Find duplicated outputs. If there are multiple stores, they should all
@@ -2734,7 +2724,7 @@ deduplicate_outputs(struct linkage_info *linkage,
struct hash_entry *entry = _mesa_hash_table_search(*table, value);
if (!entry) {
_mesa_hash_table_insert(*table, value, (void*)(uintptr_t)i);
_mesa_hash_table_insert(*table, value, (void *)(uintptr_t)i);
continue;
}
@@ -2742,16 +2732,15 @@ deduplicate_outputs(struct linkage_info *linkage,
struct scalar_slot *found_slot = &linkage->slot[(uintptr_t)entry->data];
nir_intrinsic_instr *store =
list_first_entry(&found_slot->producer.stores,
struct list_node, head)->instr;
struct list_node, head)
->instr;
nir_io_semantics sem = nir_intrinsic_io_semantics(store);
unsigned component = nir_intrinsic_component(store);
/* Redirect loads. */
for (unsigned list_index = 0; list_index < 2; list_index++) {
struct list_head *src_loads = list_index ? &slot->producer.loads :
&slot->consumer.loads;
struct list_head *dst_loads = list_index ? &found_slot->producer.loads :
&found_slot->consumer.loads;
struct list_head *src_loads = list_index ? &slot->producer.loads : &slot->consumer.loads;
struct list_head *dst_loads = list_index ? &found_slot->producer.loads : &found_slot->consumer.loads;
bool has_progress = !list_is_empty(src_loads);
list_for_each_entry(struct list_node, iter, src_loads, head) {
@@ -2783,8 +2772,7 @@ deduplicate_outputs(struct linkage_info *linkage,
list_splicetail(src_loads, dst_loads);
list_inithead(src_loads);
*progress |= list_index ? nir_progress_producer :
nir_progress_consumer;
*progress |= list_index ? nir_progress_producer : nir_progress_consumer;
}
}
@@ -3364,7 +3352,7 @@ gather_used_input_loads(nir_instr *instr,
case nir_intrinsic_load_per_vertex_input:
case nir_intrinsic_load_interpolated_input:
if (!(intr->instr.pass_flags & FLAG_GATHER_LOADS_VISITED)) {
assert(*num_loads < NUM_SCALAR_SLOTS*8);
assert(*num_loads < NUM_SCALAR_SLOTS * 8);
loads[(*num_loads)++] = intr;
intr->instr.pass_flags |= FLAG_GATHER_LOADS_VISITED;
}
@@ -3422,7 +3410,7 @@ try_move_postdominator(struct linkage_info *linkage,
#endif
/* Gather the input loads used by the post-dominator using DFS. */
nir_intrinsic_instr *loads[NUM_SCALAR_SLOTS*8];
nir_intrinsic_instr *loads[NUM_SCALAR_SLOTS * 8];
unsigned num_loads = 0;
gather_used_input_loads(postdom, loads, &num_loads);
assert(num_loads && "no loads were gathered");
@@ -3445,7 +3433,8 @@ try_move_postdominator(struct linkage_info *linkage,
assert(list_is_singular(&slot->producer.stores));
nir_intrinsic_instr *store =
list_first_entry(&slot->producer.stores, struct list_node,
head)->instr;
head)
->instr;
if (!block) {
block = store->instr.block;
@@ -3552,20 +3541,20 @@ try_move_postdominator(struct linkage_info *linkage,
nir_instr_as_intrinsic(baryc->parent_instr);
if (alu_interp == FLAG_INTERP_LINEAR_PIXEL ||
alu_interp == FLAG_INTERP_LINEAR_CENTROID ||
alu_interp == FLAG_INTERP_LINEAR_SAMPLE)
alu_interp == FLAG_INTERP_LINEAR_CENTROID ||
alu_interp == FLAG_INTERP_LINEAR_SAMPLE)
nir_intrinsic_set_interp_mode(baryc_i, INTERP_MODE_NOPERSPECTIVE);
else
nir_intrinsic_set_interp_mode(baryc_i, INTERP_MODE_SMOOTH);
}
new_input = nir_load_interpolated_input(
b, 1, new_bit_size, baryc, nir_imm_int(b, 0),
.base = nir_intrinsic_base(first_load),
.component = nir_intrinsic_component(first_load),
.dest_type = nir_alu_type_get_base_type(nir_intrinsic_dest_type(first_load)) |
new_bit_size,
.io_semantics = nir_intrinsic_io_semantics(first_load));
b, 1, new_bit_size, baryc, nir_imm_int(b, 0),
.base = nir_intrinsic_base(first_load),
.component = nir_intrinsic_component(first_load),
.dest_type = nir_alu_type_get_base_type(nir_intrinsic_dest_type(first_load)) |
new_bit_size,
.io_semantics = nir_intrinsic_io_semantics(first_load));
if (alu_interp == FLAG_INTERP_CONVERGENT) {
mask = new_bit_size == 16 ? linkage->convergent16_mask
@@ -3586,16 +3575,16 @@ try_move_postdominator(struct linkage_info *linkage,
for (unsigned i = 0; i < 3; i++) {
new_tes_loads[i] =
nir_load_per_vertex_input(b, 1, new_bit_size,
i ? nir_imm_int(b, i) : zero, zero,
.base = nir_intrinsic_base(first_load),
.component = nir_intrinsic_component(first_load),
.dest_type = nir_alu_type_get_base_type(nir_intrinsic_dest_type(first_load)) |
new_bit_size,
.io_semantics = nir_intrinsic_io_semantics(first_load));
i ? nir_imm_int(b, i) : zero, zero,
.base = nir_intrinsic_base(first_load),
.component = nir_intrinsic_component(first_load),
.dest_type = nir_alu_type_get_base_type(nir_intrinsic_dest_type(first_load)) |
new_bit_size,
.io_semantics = nir_intrinsic_io_semantics(first_load));
}
int remap_uvw[3] = {0, 1, 2};
int remap_wuv[3] = {2, 0, 1};
int remap_uvw[3] = { 0, 1, 2 };
int remap_wuv[3] = { 2, 0, 1 };
int *remap;
switch (alu_interp) {
@@ -3640,7 +3629,7 @@ try_move_postdominator(struct linkage_info *linkage,
.base = nir_intrinsic_base(first_load),
.component = nir_intrinsic_component(first_load),
.dest_type = nir_alu_type_get_base_type(nir_intrinsic_dest_type(first_load)) |
new_bit_size,
new_bit_size,
.io_semantics = nir_intrinsic_io_semantics(first_load));
mask = new_bit_size == 16 ? linkage->flat16_mask
@@ -3730,11 +3719,12 @@ try_move_postdominator(struct linkage_info *linkage,
*/
nir_intrinsic_instr *store =
list_first_entry(&linkage->slot[final_slot].producer.stores,
struct list_node, head)->instr;
struct list_node, head)
->instr;
nir_instr_move(b->cursor, &store->instr);
if (nir_src_bit_size(store->src[0]) != producer_clone->bit_size)
nir_intrinsic_set_src_type(store, nir_alu_type_get_base_type(nir_intrinsic_src_type(store)) |
producer_clone->bit_size);
producer_clone->bit_size);
nir_src_rewrite(&store->src[0], producer_clone);
/* Remove all loads and stores that we are replacing from the producer
@@ -3767,7 +3757,8 @@ try_move_postdominator(struct linkage_info *linkage,
} else {
assert(list_is_singular(&slot->consumer.loads));
load = &list_first_entry(&slot->consumer.loads,
struct list_node, head)->instr->instr;
struct list_node, head)
->instr->instr;
}
if (nir_instr_dominates_use(postdom_state, postdom, load)) {
@@ -3837,7 +3828,8 @@ backward_inter_shader_code_motion(struct linkage_info *linkage,
BITSET_FOREACH_SET(i, linkage->output_equal_mask, NUM_SCALAR_SLOTS) {
if (!can_optimize_varying(linkage,
vec4_slot(i)).inter_shader_code_motion)
vec4_slot(i))
.inter_shader_code_motion)
continue;
struct scalar_slot *slot = &linkage->slot[i];
@@ -3857,11 +3849,13 @@ backward_inter_shader_code_motion(struct linkage_info *linkage,
nir_def *load_def = NULL;
nir_intrinsic_instr *load =
list_first_entry(&slot->consumer.loads, struct list_node,
head)->instr;
head)
->instr;
nir_intrinsic_instr *store =
list_first_entry(&slot->producer.stores, struct list_node,
head)->instr;
list_first_entry(&slot->producer.stores, struct list_node,
head)
->instr;
/* Set interpolation flags.
* Handle interpolated TES loads first because they are special.
@@ -4054,9 +4048,9 @@ backward_inter_shader_code_motion(struct linkage_info *linkage,
(nir_op_infos[alu->op].num_inputs == 2 &&
((alu->src[0].src.ssa == load_def &&
alu->src[1].src.ssa->parent_instr->type ==
nir_instr_type_load_const) ||
nir_instr_type_load_const) ||
(alu->src[0].src.ssa->parent_instr->type ==
nir_instr_type_load_const &&
nir_instr_type_load_const &&
alu->src[1].src.ssa == load_def)))))
continue;
@@ -4173,8 +4167,7 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot,
}
nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
unsigned bit_size = nir_intrinsic_infos[intr->intrinsic].has_dest ?
intr->def.bit_size : intr->src[0].ssa->bit_size;
unsigned bit_size = nir_intrinsic_infos[intr->intrinsic].has_dest ? intr->def.bit_size : intr->src[0].ssa->bit_size;
/* Set all types to float to facilitate full IO vectorization.
* This is skipped only if mediump is not lowered to 16 bits.
@@ -4187,9 +4180,7 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot,
* lower mediump to 16 bits in the GLSL linker before this pass.
*/
if (bit_size != 32 || !sem.medium_precision) {
nir_alu_type type = nir_intrinsic_has_src_type(intr) ?
nir_intrinsic_src_type(intr) :
nir_intrinsic_dest_type(intr);
nir_alu_type type = nir_intrinsic_has_src_type(intr) ? nir_intrinsic_src_type(intr) : nir_intrinsic_dest_type(intr);
type = nir_alu_type_get_type_size(type) | nir_type_float;
if (nir_intrinsic_has_src_type(intr))
@@ -4217,11 +4208,11 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot,
fprintf(stderr, "--- relocating: %s.%c%s%s -> %s.%c%s%s FS_VEC4_TYPE_%s\n",
gl_varying_slot_name_for_stage(sem.location, linkage->producer_stage) + 13,
"xyzw"[nir_intrinsic_component(intr) % 4],
(bit_size == 16 && !sem.high_16bits) ? ".lo" : "",
(bit_size == 16 &&!sem.high_16bits) ? ".lo" : "",
(bit_size == 16 && sem.high_16bits) ? ".hi" : "",
gl_varying_slot_name_for_stage(new_semantic, linkage->producer_stage) + 13,
"xyzw"[new_component % 4],
(bit_size == 16 && !new_high_16bits) ? ".lo" : "",
(bit_size == 16 &&!new_high_16bits) ? ".lo" : "",
(bit_size == 16 && new_high_16bits) ? ".hi" : "",
fs_vec4_type_strings[fs_vec4_type]);
#endif /* PRINT_RELOCATE_SLOT */
@@ -4313,44 +4304,44 @@ relocate_slot(struct linkage_info *linkage, struct scalar_slot *slot,
case FS_VEC4_TYPE_INTERP_FP32_PERSP_PIXEL:
case FS_VEC4_TYPE_INTERP_FP16_PERSP_PIXEL:
baryc = nir_load_barycentric_pixel(b, 32,
.interp_mode = INTERP_MODE_SMOOTH);
.interp_mode = INTERP_MODE_SMOOTH);
break;
case FS_VEC4_TYPE_INTERP_FP32_PERSP_CENTROID:
case FS_VEC4_TYPE_INTERP_FP16_PERSP_CENTROID:
baryc = nir_load_barycentric_centroid(b, 32,
.interp_mode = INTERP_MODE_SMOOTH);
.interp_mode = INTERP_MODE_SMOOTH);
break;
case FS_VEC4_TYPE_INTERP_FP32_PERSP_SAMPLE:
case FS_VEC4_TYPE_INTERP_FP16_PERSP_SAMPLE:
baryc = nir_load_barycentric_sample(b, 32,
.interp_mode = INTERP_MODE_SMOOTH);
.interp_mode = INTERP_MODE_SMOOTH);
break;
case FS_VEC4_TYPE_INTERP_FP32_LINEAR_PIXEL:
case FS_VEC4_TYPE_INTERP_FP16_LINEAR_PIXEL:
baryc = nir_load_barycentric_pixel(b, 32,
.interp_mode = INTERP_MODE_NOPERSPECTIVE);
.interp_mode = INTERP_MODE_NOPERSPECTIVE);
break;
case FS_VEC4_TYPE_INTERP_FP32_LINEAR_CENTROID:
case FS_VEC4_TYPE_INTERP_FP16_LINEAR_CENTROID:
baryc = nir_load_barycentric_centroid(b, 32,
.interp_mode = INTERP_MODE_NOPERSPECTIVE);
.interp_mode = INTERP_MODE_NOPERSPECTIVE);
break;
case FS_VEC4_TYPE_INTERP_FP32_LINEAR_SAMPLE:
case FS_VEC4_TYPE_INTERP_FP16_LINEAR_SAMPLE:
baryc = nir_load_barycentric_sample(b, 32,
.interp_mode = INTERP_MODE_NOPERSPECTIVE);
.interp_mode = INTERP_MODE_NOPERSPECTIVE);
break;
case FS_VEC4_TYPE_INTERP_COLOR_PIXEL:
baryc = nir_load_barycentric_pixel(b, 32,
.interp_mode = INTERP_MODE_NONE);
.interp_mode = INTERP_MODE_NONE);
break;
case FS_VEC4_TYPE_INTERP_COLOR_CENTROID:
baryc = nir_load_barycentric_centroid(b, 32,
.interp_mode = INTERP_MODE_NONE);
.interp_mode = INTERP_MODE_NONE);
break;
case FS_VEC4_TYPE_INTERP_COLOR_SAMPLE:
baryc = nir_load_barycentric_sample(b, 32,
.interp_mode = INTERP_MODE_NONE);
.interp_mode = INTERP_MODE_NONE);
break;
default:
unreachable("invalid qualifier");
@@ -4413,7 +4404,7 @@ fs_assign_slots(struct linkage_info *linkage,
/* If the FS vec4 type is incompatible. Move to the next vec4. */
if (fs_vec4_type != FS_VEC4_TYPE_NONE &&
assigned_fs_vec4_type[vec4_slot(slot_index)] !=
FS_VEC4_TYPE_NONE &&
FS_VEC4_TYPE_NONE &&
assigned_fs_vec4_type[vec4_slot(slot_index)] != fs_vec4_type) {
slot_index = align(slot_index + slot_size, 8); /* move to next vec4 */
continue;
@@ -4599,10 +4590,7 @@ fs_assign_slot_groups(struct linkage_info *linkage,
}
fs_assign_slots(linkage, assigned_mask, assigned_fs_vec4_type,
convergent_mask,
linkage->always_interpolate_convergent_fs_inputs ?
(slot_size == 2 ? FS_VEC4_TYPE_INTERP_FP32 :
FS_VEC4_TYPE_INTERP_FP16) :
FS_VEC4_TYPE_FLAT,
linkage->always_interpolate_convergent_fs_inputs ? (slot_size == 2 ? FS_VEC4_TYPE_INTERP_FP32 : FS_VEC4_TYPE_INTERP_FP16) : FS_VEC4_TYPE_FLAT,
slot_size, NUM_SCALAR_SLOTS, true, assign_colors,
color_channel_rotate, progress);
}
@@ -4625,8 +4613,8 @@ fs_assign_slot_groups_separate_qual(struct linkage_info *linkage,
unsigned color_channel_rotate,
nir_opt_varyings_progress *progress)
{
unsigned unused_interp_slots[NUM_INTERP_QUALIFIERS] = {0};
unsigned unused_color_slots[NUM_COLOR_QUALIFIERS] = {0};
unsigned unused_interp_slots[NUM_INTERP_QUALIFIERS] = { 0 };
unsigned unused_color_slots[NUM_COLOR_QUALIFIERS] = { 0 };
/* Put interpolated slots first. */
for (unsigned i = 0; i < NUM_INTERP_QUALIFIERS; i++) {
@@ -4699,10 +4687,7 @@ fs_assign_slot_groups_separate_qual(struct linkage_info *linkage,
/* Then make the remaining convergent inputs flat. */
fs_assign_slots(linkage, assigned_mask, assigned_fs_vec4_type,
convergent_mask,
linkage->always_interpolate_convergent_fs_inputs ?
(slot_size == 2 ? FS_VEC4_TYPE_INTERP_FP32_LINEAR_PIXEL :
FS_VEC4_TYPE_INTERP_FP16_LINEAR_PIXEL) :
FS_VEC4_TYPE_FLAT,
linkage->always_interpolate_convergent_fs_inputs ? (slot_size == 2 ? FS_VEC4_TYPE_INTERP_FP32_LINEAR_PIXEL : FS_VEC4_TYPE_INTERP_FP16_LINEAR_PIXEL) : FS_VEC4_TYPE_FLAT,
slot_size, NUM_SCALAR_SLOTS, true, assign_colors,
color_channel_rotate, progress);
}
@@ -4792,7 +4777,7 @@ compact_varyings(struct linkage_info *linkage,
* Assign vec4 slot type separately, skipping over already assigned
* scalar slots.
*/
uint8_t assigned_fs_vec4_type[NUM_TOTAL_VARYING_SLOTS] = {0};
uint8_t assigned_fs_vec4_type[NUM_TOTAL_VARYING_SLOTS] = { 0 };
BITSET_DECLARE(assigned_mask, NUM_SCALAR_SLOTS);
BITSET_ZERO(assigned_mask);
@@ -4845,16 +4830,16 @@ compact_varyings(struct linkage_info *linkage,
} else {
/* Basically the same as above. */
fs_assign_slot_groups_separate_qual(
linkage, assigned_mask, assigned_fs_vec4_type,
&linkage->interp_fp32_qual_masks, linkage->flat32_mask,
linkage->convergent32_mask, NULL,
FS_VEC4_TYPE_INTERP_FP32_PERSP_PIXEL, 2, false, 0, progress);
linkage, assigned_mask, assigned_fs_vec4_type,
&linkage->interp_fp32_qual_masks, linkage->flat32_mask,
linkage->convergent32_mask, NULL,
FS_VEC4_TYPE_INTERP_FP32_PERSP_PIXEL, 2, false, 0, progress);
fs_assign_slot_groups_separate_qual(
linkage, assigned_mask, assigned_fs_vec4_type,
&linkage->interp_fp16_qual_masks, linkage->flat16_mask,
linkage->convergent16_mask, NULL,
FS_VEC4_TYPE_INTERP_FP16_PERSP_PIXEL, 1, false, 0, progress);
linkage, assigned_mask, assigned_fs_vec4_type,
&linkage->interp_fp16_qual_masks, linkage->flat16_mask,
linkage->convergent16_mask, NULL,
FS_VEC4_TYPE_INTERP_FP16_PERSP_PIXEL, 1, false, 0, progress);
}
/* Assign INTERP_MODE_EXPLICIT. Both FP32 and FP16 can occupy the same
@@ -4938,11 +4923,11 @@ compact_varyings(struct linkage_info *linkage,
color_channel_rotate, progress);
} else {
fs_assign_slot_groups_separate_qual(
linkage, assigned_mask, assigned_fs_vec4_type,
&linkage->interp_fp32_qual_masks, linkage->flat32_mask,
linkage->convergent32_mask, &linkage->color32_qual_masks,
FS_VEC4_TYPE_INTERP_FP32_PERSP_PIXEL, 2, true,
color_channel_rotate, progress);
linkage, assigned_mask, assigned_fs_vec4_type,
&linkage->interp_fp32_qual_masks, linkage->flat32_mask,
linkage->convergent32_mask, &linkage->color32_qual_masks,
FS_VEC4_TYPE_INTERP_FP32_PERSP_PIXEL, 2, true,
color_channel_rotate, progress);
}
/* Put transform-feedback-only outputs last. */
@@ -4962,7 +4947,8 @@ compact_varyings(struct linkage_info *linkage,
bool use_pos = !(linkage->producer_builder.shader->options->io_options &
nir_io_dont_use_pos_for_non_fs_varyings);
unsigned slot_index = (use_pos ? VARYING_SLOT_POS
: VARYING_SLOT_VAR0) * 8;
: VARYING_SLOT_VAR0) *
8;
if (linkage->consumer_stage == MESA_SHADER_TESS_CTRL) {
/* Make tcs_cross_invoc*_mask bits disjoint with flat*_mask bits
@@ -4981,7 +4967,7 @@ compact_varyings(struct linkage_info *linkage,
/* Remaining TCS inputs. */
vs_tcs_tes_gs_assign_slots_2sets(linkage, linkage->flat32_mask,
linkage->flat16_mask, &slot_index,
NULL, progress);
NULL, progress);
return;
}
@@ -5156,15 +5142,15 @@ init_linkage(nir_shader *producer, nir_shader *consumer, bool spirv,
.can_mix_convergent_flat_with_interpolated =
consumer->info.stage == MESA_SHADER_FRAGMENT &&
consumer->options->io_options &
nir_io_mix_convergent_flat_with_interpolated,
nir_io_mix_convergent_flat_with_interpolated,
.has_flexible_interp =
consumer->info.stage == MESA_SHADER_FRAGMENT &&
consumer->options->io_options &
nir_io_has_flexible_input_interpolation_except_flat,
nir_io_has_flexible_input_interpolation_except_flat,
.always_interpolate_convergent_fs_inputs =
consumer->info.stage == MESA_SHADER_FRAGMENT &&
consumer->options->io_options &
nir_io_always_interpolate_convergent_fs_inputs,
nir_io_always_interpolate_convergent_fs_inputs,
.producer_stage = producer->info.stage,
.consumer_stage = consumer->info.stage,
.producer_builder =
@@ -5173,13 +5159,9 @@ init_linkage(nir_shader *producer, nir_shader *consumer, bool spirv,
nir_builder_create(nir_shader_get_entrypoint(consumer)),
.max_varying_expression_cost =
producer->options->varying_expression_max_cost ?
producer->options->varying_expression_max_cost(producer, consumer) :
producer->options->max_varying_expression_cost,
producer->options->varying_expression_max_cost ? producer->options->varying_expression_max_cost(producer, consumer) : producer->options->max_varying_expression_cost,
.varying_estimate_instr_cost =
producer->options->varying_estimate_instr_cost ?
producer->options->varying_estimate_instr_cost :
default_varying_estimate_instr_cost,
producer->options->varying_estimate_instr_cost ? producer->options->varying_estimate_instr_cost : default_varying_estimate_instr_cost,
.linear_mem_ctx = linear_context(ralloc_context(NULL)),
};
@@ -5298,13 +5280,9 @@ nir_opt_varyings(nir_shader *producer, nir_shader *consumer, bool spirv,
compact_varyings(linkage, &progress);
nir_metadata_preserve(linkage->producer_builder.impl,
progress & nir_progress_producer ?
(nir_metadata_control_flow) :
nir_metadata_all);
progress & nir_progress_producer ? (nir_metadata_control_flow) : nir_metadata_all);
nir_metadata_preserve(linkage->consumer_builder.impl,
progress & nir_progress_consumer ?
(nir_metadata_control_flow) :
nir_metadata_all);
progress & nir_progress_consumer ? (nir_metadata_control_flow) : nir_metadata_all);
free_linkage(linkage);
FREE(linkage);
src/compiler/nir/nir_opt_vectorize_io.c
+21 -24
View File
@@ -23,9 +23,9 @@
* the number of IO instructions within that block.
*/
#include "util/u_dynarray.h"
#include "nir.h"
#include "nir_builder.h"
#include "util/u_dynarray.h"
/* Return 0 if loads/stores are vectorizable. Return 1 or -1 to define
* an ordering between non-vectorizable instructions. This is used by qsort,
@@ -122,11 +122,9 @@ vectorize_load(nir_intrinsic_instr *chan[8], unsigned start, unsigned count,
* inserted.
*/
for (unsigned i = start; i < start + count; i++) {
first = !first || chan[i]->instr.index < first->instr.index ?
chan[i] : first;
first = !first || chan[i]->instr.index < first->instr.index ? chan[i] : first;
if (merge_low_high_16_to_32) {
first = !first || chan[4 + i]->instr.index < first->instr.index ?
chan[4 + i] : first;
first = !first || chan[4 + i]->instr.index < first->instr.index ? chan[4 + i] : first;
}
}
@@ -183,11 +181,9 @@ vectorize_store(nir_intrinsic_instr *chan[8], unsigned start, unsigned count,
* inserted.
*/
for (unsigned i = start; i < start + count; i++) {
last = !last || chan[i]->instr.index > last->instr.index ?
chan[i] : last;
last = !last || chan[i]->instr.index > last->instr.index ? chan[i] : last;
if (merge_low_high_16_to_32) {
last = !last || chan[4 + i]->instr.index > last->instr.index ?
chan[4 + i] : last;
last = !last || chan[4 + i]->instr.index > last->instr.index ? chan[4 + i] : last;
}
}
@@ -200,12 +196,11 @@ vectorize_store(nir_intrinsic_instr *chan[8], unsigned start, unsigned count,
* 2 = high XY channels
* 3 = high ZW channels
*/
nir_io_xfb xfb[4] = {{{{0}}}};
nir_io_xfb xfb[4] = { { { { 0 } } } };
for (unsigned i = start; i < start + count; i++) {
xfb[i / 2].out[i % 2] =
(i < 2 ? nir_intrinsic_io_xfb(chan[i]) :
nir_intrinsic_io_xfb2(chan[i])).out[i % 2];
(i < 2 ? nir_intrinsic_io_xfb(chan[i]) : nir_intrinsic_io_xfb2(chan[i])).out[i % 2];
/* Merging low and high 16 bits to 32 bits is not possible
* with xfb in some cases. (and it's not implemented for
@@ -221,13 +216,12 @@ vectorize_store(nir_intrinsic_instr *chan[8], unsigned start, unsigned count,
* memory.
*/
unsigned xfb_comp_size =
nir_intrinsic_io_semantics(chan[i]).medium_precision ?
32 : chan[i]->src[0].ssa->bit_size;
nir_intrinsic_io_semantics(chan[i]).medium_precision ? 32 : chan[i]->src[0].ssa->bit_size;
for (unsigned j = i + 1; j < start + count; j++) {
if (xfb[i / 2].out[i % 2].buffer != xfb[j / 2].out[j % 2].buffer ||
xfb[i / 2].out[i % 2].offset != xfb[j / 2].out[j % 2].offset +
xfb_comp_size * (j - i))
xfb_comp_size * (j - i))
break;
xfb[i / 2].out[i % 2].num_components++;
@@ -242,8 +236,7 @@ vectorize_store(nir_intrinsic_instr *chan[8], unsigned start, unsigned count,
/* Update gs_streams. */
unsigned gs_streams = 0;
for (unsigned i = start; i < start + count; i++) {
gs_streams |= (nir_intrinsic_io_semantics(chan[i]).gs_streams & 0x3) <<
((i - start) * 2);
gs_streams |= (nir_intrinsic_io_semantics(chan[i]).gs_streams & 0x3) << ((i - start) * 2);
}
nir_io_semantics sem = nir_intrinsic_io_semantics(last);
@@ -342,9 +335,13 @@ vectorize_slot(nir_intrinsic_instr *chan[8], unsigned mask)
unsigned hi = i + 4;
if ((i < 2 ? nir_intrinsic_io_xfb(chan[i])
: nir_intrinsic_io_xfb2(chan[i])).out[i % 2].num_components ||
: nir_intrinsic_io_xfb2(chan[i]))
.out[i % 2]
.num_components ||
(i < 2 ? nir_intrinsic_io_xfb(chan[hi])
: nir_intrinsic_io_xfb2(chan[hi])).out[i % 2].num_components)
: nir_intrinsic_io_xfb2(chan[hi]))
.out[i % 2]
.num_components)
continue;
}
@@ -405,9 +402,9 @@ vectorize_batch(struct util_dynarray *io_instructions)
*
* This reorders instructions in the array, but not in the shader.
*/
qsort(io_instructions->data, num_instr, sizeof(void*), compare_intr);
qsort(io_instructions->data, num_instr, sizeof(void *), compare_intr);
nir_intrinsic_instr *chan[8] = {0}, *prev = NULL;
nir_intrinsic_instr *chan[8] = { 0 }, *prev = NULL;
unsigned chan_mask = 0;
bool progress = false;
@@ -498,7 +495,7 @@ nir_opt_vectorize_io(nir_shader *shader, nir_variable_mode modes)
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
bool is_load = nir_intrinsic_infos[intr->intrinsic].has_dest;
bool is_output = false;
nir_io_semantics sem = {0};
nir_io_semantics sem = { 0 };
unsigned index = 0;
if (nir_intrinsic_has_io_semantics(intr)) {
@@ -576,8 +573,8 @@ nir_opt_vectorize_io(nir_shader *shader, nir_variable_mode modes)
}
nir_metadata_preserve(impl, progress ? (nir_metadata_block_index |
nir_metadata_dominance) :
nir_metadata_all);
nir_metadata_dominance)
: nir_metadata_all);
global_progress |= progress;
}
util_dynarray_fini(&io_instructions);
src/compiler/nir/nir_passthrough_gs.c
+3 -4
View File
@@ -160,7 +160,7 @@ nir_create_passthrough_gs(const nir_shader_compiler_options *options,
nir_foreach_shader_out_variable(var, prev_stage) {
assert(!var->data.patch);
assert(var->data.location != VARYING_SLOT_PRIMITIVE_ID &&
"not a VS output");
"not a VS output");
/* input vars can't be created for those */
if (var->data.location == VARYING_SLOT_LAYER ||
@@ -215,10 +215,10 @@ nir_create_passthrough_gs(const nir_shader_compiler_options *options,
* shader will expect.
*/
in_vars[num_inputs++] = nir_create_variable_with_location(
nir, nir_var_shader_in, VARYING_SLOT_PRIMITIVE_ID, glsl_int_type());
nir, nir_var_shader_in, VARYING_SLOT_PRIMITIVE_ID, glsl_int_type());
out_vars[num_outputs++] = nir_create_variable_with_location(
nir, nir_var_shader_out, VARYING_SLOT_PRIMITIVE_ID, glsl_int_type());
nir, nir_var_shader_out, VARYING_SLOT_PRIMITIVE_ID, glsl_int_type());
}
unsigned int start_vert = 0;
@@ -283,7 +283,6 @@ nir_create_passthrough_gs(const nir_shader_compiler_options *options,
nir_def *edge_value = nir_channel(&b, nir_load_array_var_imm(&b, edge_var, idx), 0);
nir_push_if(&b, nir_fneu_imm(&b, edge_value, 1.0));
nir_end_primitive(&b, 0);
}
nir_pop_if(&b, NULL);
}
src/compiler/nir/nir_phi_builder.c
+2 -2
View File
@@ -22,8 +22,8 @@
*/
#include "nir_phi_builder.h"
#include "nir_vla.h"
#include "nir.h"
#include "nir_vla.h"
struct nir_phi_builder {
nir_shader *shader;
@@ -44,7 +44,7 @@ struct nir_phi_builder {
nir_block **W;
};
#define NEEDS_PHI ((nir_def *)(intptr_t)-1)
#define NEEDS_PHI ((nir_def *)(intptr_t) - 1)
struct nir_phi_builder_value {
struct exec_node node;
src/compiler/nir/nir_print.c
+5 -5
View File
@@ -916,9 +916,9 @@ print_var_decl(nir_variable *var, print_state *state)
fprintf(fp, " (%s%s)", loc, components);
} else {
fprintf(fp, " (%s%s, %u, %u)%s", loc,
components,
var->data.driver_location, var->data.binding,
var->data.compact ? " compact" : "");
components,
var->data.driver_location, var->data.binding,
var->data.compact ? " compact" : "");
}
}
@@ -2552,7 +2552,7 @@ print_shader_info(const struct shader_info *info, FILE *fp)
{
fprintf(fp, "shader: %s\n", gl_shader_stage_name(info->stage));
if (memcmp(info->source_blake3, &(blake3_hash){0}, sizeof(info->source_blake3))) {
if (memcmp(info->source_blake3, &(blake3_hash){ 0 }, sizeof(info->source_blake3))) {
fprintf(fp, "source_blake3: {");
_mesa_blake3_print(fp, info->source_blake3);
fprintf(fp, "}\n");
@@ -2797,7 +2797,7 @@ _nir_print_shader_annotated(nir_shader *shader, FILE *fp,
if (mode == nir_var_shader_in || mode == nir_var_shader_out) {
for (unsigned j = 0; j < 128; j++) {
nir_variable *vars[NIR_MAX_VEC_COMPONENTS] = {0};
nir_variable *vars[NIR_MAX_VEC_COMPONENTS] = { 0 };
nir_foreach_variable_with_modes(var, shader, mode) {
if (var->data.location == j)
vars[var->data.location_frac] = var;
src/compiler/nir/nir_schedule.c
+1 -1
View File
@@ -22,9 +22,9 @@
*/
#include "nir_schedule.h"
#include "nir.h"
#include "util/dag.h"
#include "util/u_dynarray.h"
#include "nir.h"
/** @file
*
src/compiler/nir/nir_serialize.c
+1 -1
View File
@@ -832,7 +832,7 @@ read_alu(read_ctx *ctx, union packed_instr header)
return alu;
}
#define NUM_GENERIC_MODES 4
#define NUM_GENERIC_MODES 4
#define MODE_ENC_GENERIC_BIT (1 << 5)
static nir_variable_mode
src/compiler/nir/nir_split_per_member_structs.c
+1 -1
View File
@@ -21,8 +21,8 @@
* IN THE SOFTWARE.
*/
#include "nir_deref.h"
#include "nir_builder.h"
#include "nir_deref.h"
static nir_variable *
find_var_member(struct nir_variable *var, unsigned member,
src/compiler/nir/nir_split_var_copies.c
+2 -2
View File
@@ -104,6 +104,6 @@ bool
nir_split_var_copies(nir_shader *shader)
{
return nir_shader_intrinsics_pass(shader, split_var_copies_instr,
nir_metadata_control_flow,
NULL);
nir_metadata_control_flow,
NULL);
}
src/compiler/nir/nir_split_vars.c
-1
View File
@@ -40,7 +40,6 @@ is_array_deref_of_vec(nir_deref_instr *deref)
return glsl_type_is_vector_or_scalar(parent->type);
}
static struct set *
get_complex_used_vars(nir_shader *shader, void *mem_ctx)
{
src/compiler/nir/nir_sweep.c
+2 -2
View File
@@ -21,8 +21,8 @@
* IN THE SOFTWARE.
*/
#include "nir.h"
#include "util/u_printf.h"
#include "nir.h"
/**
* \file nir_sweep.c
@@ -60,7 +60,7 @@ sweep_block(nir_shader *nir, nir_block *block)
gc_mark_live(nir->gctx, src);
break;
case nir_instr_type_intrinsic:
ralloc_steal(nir, (void*)nir_instr_as_intrinsic(instr)->name);
ralloc_steal(nir, (void *)nir_instr_as_intrinsic(instr)->name);
break;
default:
break;
src/compiler/nir/nir_validate.c
+20 -20
View File
@@ -635,8 +635,8 @@ validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state)
enum glsl_interp_mode mode = nir_intrinsic_interp_mode(instr);
validate_assert(state,
mode == INTERP_MODE_NONE ||
mode == INTERP_MODE_SMOOTH ||
mode == INTERP_MODE_NOPERSPECTIVE);
mode == INTERP_MODE_SMOOTH ||
mode == INTERP_MODE_NOPERSPECTIVE);
break;
}
@@ -662,7 +662,7 @@ validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state)
validate_assert(state, nir_src_bit_size(instr->src[0]) >= 16);
validate_assert(state,
nir_src_bit_size(instr->src[0]) ==
nir_alu_type_get_type_size(nir_intrinsic_src_type(instr)));
nir_alu_type_get_type_size(nir_intrinsic_src_type(instr)));
break;
case nir_intrinsic_deref_mode_is:
@@ -785,29 +785,29 @@ validate_intrinsic_instr(nir_intrinsic_instr *instr, validate_state *state)
validate_assert(state,
(nir_slot_is_sysval_output(sem.location, MESA_SHADER_NONE) &&
!sem.no_sysval_output) ||
(nir_slot_is_varying(sem.location, MESA_SHADER_NONE) &&
!sem.no_varying) ||
nir_instr_xfb_write_mask(instr) ||
/* TCS can set no_varying and no_sysval_output, meaning
* that the output is only read by TCS and not TES.
*/
state->shader->info.stage == MESA_SHADER_TESS_CTRL);
(nir_slot_is_varying(sem.location, MESA_SHADER_NONE) &&
!sem.no_varying) ||
nir_instr_xfb_write_mask(instr) ||
/* TCS can set no_varying and no_sysval_output, meaning
* that the output is only read by TCS and not TES.
*/
state->shader->info.stage == MESA_SHADER_TESS_CTRL);
validate_assert(state,
(!sem.dual_source_blend_index &&
!sem.fb_fetch_output &&
!sem.fb_fetch_output_coherent) ||
state->shader->info.stage == MESA_SHADER_FRAGMENT);
state->shader->info.stage == MESA_SHADER_FRAGMENT);
validate_assert(state,
!sem.gs_streams ||
state->shader->info.stage == MESA_SHADER_GEOMETRY);
state->shader->info.stage == MESA_SHADER_GEOMETRY);
validate_assert(state,
!sem.high_dvec2 ||
(state->shader->info.stage == MESA_SHADER_VERTEX &&
instr->intrinsic == nir_intrinsic_load_input));
(state->shader->info.stage == MESA_SHADER_VERTEX &&
instr->intrinsic == nir_intrinsic_load_input));
validate_assert(state,
!sem.interp_explicit_strict ||
(state->shader->info.stage == MESA_SHADER_FRAGMENT &&
instr->intrinsic == nir_intrinsic_load_input_vertex));
(state->shader->info.stage == MESA_SHADER_FRAGMENT &&
instr->intrinsic == nir_intrinsic_load_input_vertex));
}
}
@@ -842,14 +842,14 @@ validate_tex_src_texture_deref(nir_tex_instr *instr, validate_state *state,
case nir_texop_fragment_mask_fetch_amd:
case nir_texop_txf_ms_mcs_intel:
validate_assert(state, nir_alu_type_get_base_type(instr->dest_type) == nir_type_int ||
nir_alu_type_get_base_type(instr->dest_type) == nir_type_uint);
nir_alu_type_get_base_type(instr->dest_type) == nir_type_uint);
break;
default:
validate_assert(state,
glsl_get_sampler_result_type(deref->type) == GLSL_TYPE_VOID ||
glsl_base_type_is_integer(glsl_get_sampler_result_type(deref->type)) ==
(nir_alu_type_get_base_type(instr->dest_type) == nir_type_int ||
nir_alu_type_get_base_type(instr->dest_type) == nir_type_uint));
glsl_base_type_is_integer(glsl_get_sampler_result_type(deref->type)) ==
(nir_alu_type_get_base_type(instr->dest_type) == nir_type_int ||
nir_alu_type_get_base_type(instr->dest_type) == nir_type_uint));
}
}