Commit Graph

41 Commits

Author SHA1 Message Date
Marek Olšák 0dc5d649ea winsys/amdgpu: fall back to a normal priority without root in the winsys
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>
2025-05-28 10:23:15 +00:00
Marek Olšák 2ef6aa5934 winsys/amdgpu: pass PIPE_CONTEXT_* flags to ctx_create
instead of using our own flags; also REALTIME_PRIORITY is never used,
so the relevant code is removed

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>
2025-05-28 10:23:15 +00:00
Marek Olšák 7f441beaf6 winsys/amdgpu: set the priority for gfx user queues
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>
2025-05-28 10:23:15 +00:00
Marek Olšák 6785e42511 winsys/amdgpu: add a high priority gfx queue
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>
2025-05-28 10:23:15 +00:00
Marek Olšák 59e93b02e0 winsys/amdgpu: add enums for queues using the fence rings
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>
2025-05-28 10:23:15 +00:00
Marek Olšák d9e681ee3f winsys/amdgpu: use alt_fence for all video queues
It's already used by VCN queues.

This reduces the size of sequence numbers stored per BO.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34983>
2025-05-28 10:23:14 +00:00
Yogesh Mohan Marimuthu 0298ee5719 winsys/amdgpu: apu fwm packet supports only 4 max fences
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34803>
2025-05-27 14:25:50 +00:00
Wei Zhao 9a21ac2730 winsys/amdgpu: Remove assert about user fence in amdgpu_fence_wait
The assertion `assert(afence->seq_no <= *user_fence_cpu)` in
`amdgpu_fence_wait` can trigger a Mesa exit during GPU mode2 resets in
virtualized guest environments.

A GPU reset can cause the hardware to discard commands, including the
one that updates the user fence BO (`*user_fence_cpu`). This leaves
`*user_fence_cpu` with an older value, while `afence->seq_no` (from
command submission) is newer, leading to
`afence->seq_no > *user_fence_cpu` and triggering the assert.

Removing this assert prevents Mesa from exiting in this reset scenario.
No adverse side effects observed during testing. The assert appears
overly strict for hardware reset events where command completion is not
guaranteed.

Signed-off-by: Wei Zhao <wei.zhao@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34924>
2025-05-13 14:51:01 +00:00
Arunpravin Paneer Selvam 84f18f31ad amdgpu: Add queue id support to the user queue wait IOCTL
Add queue id support to the user queue wait IOCTL
drm_amdgpu_userq_wait structure.

This is required to retrieve the wait user queue and maintain
the fence driver references in it so that the user queue in
the same context releases their reference to the fence drivers
at some point before queue destruction.

Otherwise, we would gather those references until we
don't have any more space left and crash.

Signed-off-by: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34493>
2025-04-18 21:55:53 +00:00
Yogesh Mohan Marimuthu 61fd80a42e ac,winsys/amdgpu: get userq_ip_mask supported from kernel info ioctl
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34370>
2025-04-18 07:45:33 +00:00
Marek Olšák 480c8addd8 winsys/amdgpu: don't add VM_ALWAYS_VALID buffers into the BO list
They shouldn't be there.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34491>
2025-04-14 22:44:13 +00:00
Marek Olšák c96f7a079f winsys/amdgpu: don't use 32-bit address space for IBs
We run out of the 32-bit address space and then we crash.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33482>
2025-03-06 21:10:50 +00:00
Yogesh Mohan Marimuthu 5b02378c6f winsys/amdgpu: userq non imported fence can be ignored for same ip_type
Since there is only one userq per process there is no need to add
glWaitSync to cs->seq_no_dependencies if the fence is not imported
and ip type is same.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu 224c0cfbdd winsys/amdgpu: userqueue multi ctx jobs are guaranteed to be in sequence
Jobs from multiple context are submitted to aws->cs_queue are executed in order. Jobs
in aws->cs_queue are directly added to userqueue ring, hence userqueue execution order
between context is guaranteed in case of userqueue.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu 659a41293b winsys/amdgpu: same_queue variable should be set if there is only one queue
Fixes: 45fa34284f ("winsys/amdgpu: don't add fence dependency of other queues for userq")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu 06691b9f39 winsys/amdgpu: amdgpu_cs_context is csc, amdgpu_cs is acs
radeon_cmdbuf is rcs instead of rws, probably earlier renaming of
rws was agressive.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu fc36840c04 winsys/amdgpu: make csc context as array
Instead of csc1 and csc2, make it as an array. Use current_cs_index
to point to csc that will be getting filled with commands.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
2025-02-26 13:53:44 +00:00
Yogesh Mohan Marimuthu eb5bd057a1 winsys/amdgpu: do not use rcs->csc
Use amdgpu_cs(rcs)->csc. This will give more code readability with
next cleanup patches.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33661>
2025-02-26 13:53:43 +00:00
David Rosca d8b91b72b9 winsys/amdgpu: Add assert for secure submissions on compute ring
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33601>
2025-02-20 07:28:46 +00:00
Pierre-Eric Pelloux-Prayer 2b8c3a12c6 winsys/amdgpu: treat cs overflow as context lost
The existing code relies on assert to identify when a cs overlow
occurs. On builds without asserts, a cs overflow won't be detected
and it will likely lead to a hang.

Reporting a preemptively a PIPE_UNKNOWN_CONTEXT_RESET error seems
ok as the context is lost anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33288>
2025-01-31 08:13:34 +00:00
Yogesh Mohan Marimuthu bfa6b9b655 winsys/amdgpu: ensure strict order in updating mqd wptr and doorbell
Need to use mfence to strictly order mqd wptr update and ringing doorbell
in cpu. If the compiler or cpu re-orders it, commands will be missed.

Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32700>
2025-01-20 09:28:10 +00:00
Yogesh Mohan Marimuthu 57f28ad47f winsys/amdgpu: use next_wptr as cache for userq
The userq packets are added using _pkt_begin(), _pkt_add(), _pkt_end()
functions. As of now _pkt_being() and _pkt_add() is called once. It
is not advisible to update wptr value in mqd multiple times. Hence use
next_wptr as cache in the macros and update mqd mptr before job submission
only once.

Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32700>
2025-01-20 09:28:10 +00:00
Yogesh Mohan Marimuthu acbfcb4d36 winsys/amdgpu: ring doorbell before calling userq_signal ioctl
The signal ioctl should only be called after guaranteeing that the hardware
started working on the submissions and that is only after doorbell is ringed.

Otherwise it can in theory happen that the application creates the fence and
is then interrupted before ringing the doorbell. That can result in a GPU
reset because the fence times out.

Suggested-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32700>
2025-01-20 09:28:10 +00:00
Pierre-Eric Pelloux-Prayer 612774c4a6 radeonsi: enable virtio native context support
Tested-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21658>
2025-01-16 12:24:32 +00:00
Pierre-Eric Pelloux-Prayer a565f2994f amd: move all uses of libdrm_amdgpu to ac_linux_drm
This is required to implement virtio native-context.

In a virtualized environment, most of the functions provided
by libdrm_amdgpu will be implemented using virtio.
This allows to implement efficient virtualization, by
forwarding the kernel API to the host, instead of the GL/VK calls.

Similarly, the raw 'fd' or 'gem_handle' arguments are replaced
by opaque types. This allows to encapsulate all the needed
state in the handle, and use unmodified API between baremetal
and virtualized contexts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21658>
2025-01-16 12:24:32 +00:00
Yogesh Mohan Marimuthu 8447cb563f winsys/amdgpu: send hdp flush packet for userq
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Yogesh Mohan Marimuthu 45fa34284f winsys/amdgpu: don't add fence dependency of other queues for userq
In case of userq, there will be only 1 userq per process. So all the jobs for
that process goes into single queue. Hence there is no need to add fence
of other queues even if info num_queues is > 1.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Yogesh Mohan Marimuthu 93703d2d19 winsys/amdgpu: add userq cmd submission support in amdgpu_cs_submit_ib()
This patch adds the job submission code for userq. An indirect buffer, in
short ib, can be considered a job. The job is submitted directly to the
userq ring buffer and the doorbell is rung to notify the firmware to
execute the job.

The packets that are submitted to execute the job is below,

1) fence wait multi packet for any dependency fence
2) hdp flush packs to flush host data path
3) indirect buffer packet
4) protected signal packet

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Yogesh Mohan Marimuthu 97664d9e84 winsys/amdgpu: move legacy chunk init and submission to new function
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Yogesh Mohan Marimuthu afeb500498 winsys/amdgpu: move noop and ib_bytes adjustment to cs_flush
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Yogesh Mohan Marimuthu 086741b3ae winsys/amdgpu: call userq init and destroy functions
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29010>
2024-12-03 12:02:06 +00:00
Marek Olšák 049641ca54 amd: import libdrm_amdgpu ioctl wrappers
This imports 35 libdrm_amdgpu functions into Mesa.

The following 15 functions are still in use:
   amdgpu_bo_alloc
   amdgpu_bo_cpu_map
   amdgpu_bo_cpu_unmap
   amdgpu_bo_export
   amdgpu_bo_free
   amdgpu_bo_import
   amdgpu_create_bo_from_user_mem
   amdgpu_device_deinitialize
   amdgpu_device_get_fd
   amdgpu_device_initialize
   amdgpu_get_marketing_name
   amdgpu_query_sw_info
   amdgpu_va_get_start_addr
   amdgpu_va_range_alloc
   amdgpu_va_range_free

We can't import them because they make sure that we only use 1 VMID
per process shared by all APIs. (except the marketing name)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32067>
2024-11-25 21:03:41 -05:00
Marek Olšák e303aae145 radeonsi: remove RADEON_FLAG_READ_ONLY
It's not used much and it doubles the number of heaps.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Yonggang Luo 1ac1c0843f treewide: Replace usage of macro DEBUG with MESA_DEBUG when possible
This is achieved by the following steps:

#ifndef DEBUG => #if !MESA_DEBUG
defined(DEBUG) => MESA_DEBUG
#ifdef DEBUG => #if MESA_DEBUG

This is done by replace in vscode

excludes
docs,*.rs,addrlib,src/imgui,*.sh,src/intel/vulkan/grl/gpu

These are safe because those files should keep DEBUG macro is already excluded;
and not directly replace DEBUG, as we have some symbols around it.

Use debug or NDEBUG instead of DEBUG in comments when proper

This for reduce the usage of DEBUG,
so it's easier migrating to MESA_DEBUG

These are found when migrating DEBUG to MESA_DEBUG,
these are all comment update, so it's safe

Replace comment /* DEBUG */ and /* !DEBUG */ with proper /* MESA_DEBUG */ or /* !MESA_DEBUG */ manually

DEBUG || !NDEBUG -> MESA_DEBUG || !NDEBUG
!DEBUG && NDEBUG -> !(MESA_DEBUG || !NDEBUG)

Replace the DEBUG present in comment with proper new MESA_DEBUG manually

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28092>
2024-03-22 18:22:34 +00:00
Yogesh Mohan Marimuthu f93f7f8f3a winsys/amdgpu: remove tab space
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27968>
2024-03-15 18:06:55 +00:00
Yogesh Mohan Marimuthu 5b6c0fdc97 winsys/amdgpu: aws instead of ws for amdgpu_winsys
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27968>
2024-03-15 18:06:55 +00:00
Yogesh Mohan Marimuthu c7e8486130 winsys/amdgpu: rws instead of ws for radeon_winsys
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27968>
2024-03-15 18:06:55 +00:00
Yogesh Mohan Marimuthu f2275eed44 winsys/amdgpu: sws instead of ws for amdgpu_screen_winsys
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27968>
2024-03-15 18:06:55 +00:00
Yonggang Luo 680e707534 treewide: Replace the invalid usage #if DEBUG with #ifdef DEBUG
This is done by find&replace and exclude the following folders in vscode
docs,*.rs,addrlib,src/imgui,*.sh,src/intel/vulkan/grl/gpu

This is a prepare step for re-working https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21946

These issues are found when to try switch DEBUG to MESA_DEBUG=0|1 in MR

https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28092

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28083>
2024-03-15 16:08:18 +00:00
Marek Olšák f933536517 winsys/amdgpu: enable unlimited number of parallel queues for VCN
This fixes a VCN performance regression introduced by the new BO fence
tracking mechanism.

VCN can have many queues. The current BO fence tracking mechanism only
supports 1 queue per IP, and there is an interest to use all VCN queues via
VAAPI. This introduces an alternative BO fence tracking mechanism that is
only enabled for VCN, supports unlimited parallel queues, is similar to
the previous system, can co-exist with the current queue system, and has no
negative impact on CPU overhead as long as it's only used by VCN.

Since we want an unlimited number of queues, we can't generate our own
sequence numbers for those queues. Instead, each buffer will have a new
field "alt_fence", which means an alternative fence. This fence is the last
use of that buffer on any VCN queue. If any other queue wants to use that
buffer, it has to insert alt_fence as a dependency, and replace alt_fence
with the new submitted fence, so that it's always equal to the last use.

Only VCN uses and updates alt_fence when an IB is submitted. Other IPs only
use alt_fence as a fence dependency. alt_fence is NULL when VCN isn't used,
so there is no negative impact on CPU overhead in that case.

It uses a C++ template for amdgpu_cs_submit_ib due to different BO loop
bodies between normal queues and VCN. Those loop bodies execute for every
BO, so they shouldn't have extra code for alt_fence if the queue doesn't
update it.

Acked-and-Tested-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27627>
2024-02-17 03:06:32 +00:00
Marek Olšák 3e118c6d2f winsys/amdgpu: convert amdgpu_cs.c to .cpp
it will use a C++ template

Acked-and-Tested-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27627>
2024-02-17 03:06:32 +00:00