Commit Graph

193069 Commits

Author SHA1 Message Date
Alyssa Rosenzweig cd6dfd6c2d nvk: use common stype debug
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009>
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig 9d34c0f705 vulkan: add vk_debug_ignored_stype helper
from nvk.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009>
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig 9d5f15abb0 docs: add header-stub for vk_enum_to_str
Suppresses fail from test-docs-mr. from the next commit.

Trivial.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29009>
2024-05-10 18:49:38 +00:00
Alyssa Rosenzweig 3ccf7208a2 nir/lower_robust_access: also handle image derefs
for unlowered image intrinsics

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28681>
2024-05-10 17:49:13 +00:00
Alyssa Rosenzweig fb187c9c89 nir/lower_subgroups: relax ballot_type_to_uint
we can generate 32-bit scalar inverse_ballots from the boolean reduce lowering
which will blow up when trying to lower the resulting inverse_ballot with the
common lowering. but the assert can be quieted just fine.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
2024-05-10 17:00:54 +00:00
Alyssa Rosenzweig b9a0c8dc6d nir/lower_subgroups: add generic scan/reduce lower
this is the lowering from NAK, fixed up for common code. the existing code is
used for boolean scan/reduce. I make no guarantee that this works for subgroup
sizes other than 32.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
2024-05-10 17:00:54 +00:00
Alyssa Rosenzweig 8b070c36ec nir/lower_subgroups: add filter
this will be useful for AGX, which has many reductions (but not all) in
hardware with the logic too backend-specific to encode with bitflags.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
2024-05-10 17:00:54 +00:00
Juan A. Suarez Romero 3990463c48 v3d/vc4/ci: set full renderer version check
Include the full expected renderer name, with the version.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27449>
2024-05-10 15:00:44 +00:00
Eric Engestrom c0e6a72b00 rpi5/ci: use deqp-runner suite for vk job
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27449>
2024-05-10 15:00:44 +00:00
Eric Engestrom 993dd0832f rpi4/ci: use deqp-runner suite for vk job as well
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27449>
2024-05-10 15:00:44 +00:00
Luc Ma 3825e24085 loader: silence implicit-load zink error by the loader
Since commit 7d9ea77b45 ("glx: add automatic zink fallback loading between hw
and sw drivers"), zink could be tried as a fallback. It'd better silence
if the zink loading is implicit and on fail as what commit 4cc975c6e9 ("glx: silence
more implicit-load zink errors") has done. But there seems to be one
left bebind, which is spit when building swrast but no zink with -Dglx=dri.

v2: plumb the flag through from egl/glx to the loader (zmike)

Signed-off-by: Luc Ma <luc@sietium.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28970>
2024-05-10 14:19:59 +00:00
Eric Engestrom dc7e80ce85 ci/shader-db: drop extra nesting section
`.gitlab-ci/run-shader-db.sh` already prints sections, having an extra one
here just means that nothing is visible by default.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29113>
2024-05-10 13:02:15 +00:00
Eric Engestrom d428cc1116 ci/debian-build-testing: drop extra nesting section
`.gitlab-ci/meson/build.sh` already prints sections, having an extra one
here just means that nothing is visible by default.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29113>
2024-05-10 13:02:15 +00:00
Rhys Perry 75532d8687 aco: add wait_imm::unpack and wait_imm::max
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:08 +00:00
Rhys Perry c894c9ab1b aco/stats: refactor for indexable wait_imm
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:08 +00:00
Rhys Perry f3e461d643 aco/waitcnt: refactor for indexable wait_imm
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:08 +00:00
Rhys Perry ff2e3ef5eb aco/waitcnt: add target_info
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:08 +00:00
Rhys Perry 20b4e30e25 aco: make wait_imm indexable
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:08 +00:00
Rhys Perry 5b1b09ad42 aco/waitcnt: fix DS/VMEM ordered writes when mixed
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:08 +00:00
Rhys Perry 16eae62f0d aco/stats: don't use VS counter pre-GFX10
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:08 +00:00
Rhys Perry 16a9f6e2a4 aco/stats: fix s_waitcnt parsing
This was broken for GFX11 (s_waitcnt encoding changed) and s_waitcnt_vscnt
(waited for vm/lgkm/exp to be 0).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28981>
2024-05-10 11:53:07 +00:00
Mike Blumenkrantz cd004defd4 u_blitter: stop leaking saved blitter states on no-op blits
drivers expect blitter to clean up after itself

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29122>
2024-05-10 11:10:55 +00:00
Timothy Arceri c44e76676b glsl: use hash table when serializing resource data
This helps us avoid a potential huge number of string compares.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11128

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29116>
2024-05-10 00:47:17 +00:00
Ian Romanick f6e038fd0f spirv: Use fp16 fp_fast_math settings when lowering fp16 asin and acos
v2: Save and restore fp_fast_math. Suggested by Georg and Ivan.

v3: Add a message to the static_assert.

Fixes: 750bd9757e ("spirv: gather some float controls bits per instruction")
Reviewed-by: Ivan Briano <ivan.briano@intel.com> [v2]
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v2]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29091>
2024-05-10 00:05:34 +00:00
Mike Blumenkrantz 67a356742f zink: add a batch ref for committed sparse resources
this ensures that the sparse commit will complete before the resource
is destroyed

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29123>
2024-05-09 23:20:30 +00:00
Alexandre Marquet ee9809c889 pan/mdg: quirk to disable auto32
For some reason, flat shading on T604 does not work when using auto32 varyings
type.

This commit introduces a quirk for T60x, and some plumbing in pan_nir, allowing to
explicitely use appropriate types, rather than always using .u32 for flat shading.

Backport-to: 24.1
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10632
Signed-off-by: Alexandre Marquet <tb@a-marquet.fr>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28146>
2024-05-09 21:21:32 +00:00
Sathishkumar S 7246f25677 radeonsi/vcn: enable yuv440 jpeg decode
jpeg version 2 and higher support yuv440 decode

v2: fix ci error to handle PIPE_VIDEO_CHROMA_FORMAT_440 in switch statement

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28866>
2024-05-09 20:43:02 +00:00
Sathishkumar S 906f207f9c frontends/va,gallium/vl: add support for yuv440 format
define image and video buffer parameters corresponding to yuv440 format

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28866>
2024-05-09 20:43:02 +00:00
Sathishkumar S afd15f481b util/format: add planar3 y8_u8_v8_440 pipe format
add pipe format to represent yuv440 surface

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28866>
2024-05-09 20:43:02 +00:00
Saroj Kumar 221371e903 mesa: replace shader_info::source_sha1
Replace shader_info::source_sha1 with shader_info::source_blake3 in compiler, mesa and radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28156>
2024-05-09 20:08:18 +00:00
Saroj Kumar 7c0b0e660a mesa: Add functions to print blake3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28156>
2024-05-09 20:08:17 +00:00
Sagar Ghuge 69fc7ee622 intel/disasm: Fix cache load/store disassembly for URB messages
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28868>
2024-05-09 19:45:18 +00:00
Georg Lehmann 925fff229f zink: use bitcasts instead of pack/unpack double opcodes
The pack/unpack double opcodes may flush denorms, and the nir ops are pure
bitcasts.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29125>
2024-05-09 18:47:33 +02:00
Karol Herbst 146ac5169d rusticl/icd: remove CLObject
I have no idea why I've added it in the first place, but it's causing dead
code warnings to appear with newer rustc versions, so remove it.

Fixes: 7f77f91929 ("rusticl/icd: split Arc part out of CLObject into new trait")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29120>
2024-05-09 12:37:11 +00:00
Rhys Perry 9d2711fcb8 nir/dead_cf: stop reindexing blocks for each non-block cf node
This is faster, especially for large shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29085>
2024-05-09 09:57:10 +00:00
Daniel Stone e86a2b0db1 Revert "ci: disable g52"
This reverts commit f02310934c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29117>
2024-05-09 09:59:11 +01:00
Samuel Pitoiset 43fbbc0732 radv: track and bind more VRS states from the graphics pipeline
This doesn't change anything but this will allow us to emit all
graphics shaders from the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
2024-05-09 08:15:56 +00:00
Samuel Pitoiset 8c17b05615 radv: do not emit non-context registers to radv_pipeline::ctx_cs
These registers don't cause context rolls.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
2024-05-09 08:15:56 +00:00
Samuel Pitoiset 24814be08a radv: stop recomputing the last VGT API stage when emitting graphics shaders
The last VGT shader is already set correctly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
2024-05-09 08:15:56 +00:00
Samuel Pitoiset 6753f981b6 radv: remove unused parameter to radv_pipeline_emit_pm4()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29103>
2024-05-09 08:15:56 +00:00
Juan A. Suarez Romero 920025533e broadcom/compiler: do not run lowering I/O for FS
This lowering is applied only for vertex and geometry shaders. So detect
earlier this situation and do not go ahead with other shader.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29102>
2024-05-09 07:55:00 +00:00
Iago Toral Quiroga 1545dc94b4 broadcom/compiler: simplify v3d_vir_emit_tex
In the past where backends had to deal with nir_register we needed
a specific path for them here because nir_def_components_read only
worked on ssa defs, but now that we got rid of nir_register we
only have nir_def and we don't need to go out of our way to do this
and we can just always use nir_def_components_read.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978>
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga c24a149d2d broadcom/compiler: don't read excess channels on image loads
This is similar to what we do for textures where we program a number
of channels matching the number of componentes actually read by the
shader.

Makes tests like dEQP-VK.image.load_store.with_format.2d.r32_uint
drop from 18 instructions to 14 by emitting a single ldtmu instead
of 4.

From dEQP-VK.image.load_store.*:

total instructions in shared programs: 12681 -> 12093 (-4.64%)
instructions in affected programs: 4866 -> 4278 (-12.08%)
helped: 256
HURT: 0
helped stats (abs) min: 1 max: 4 x̄: 2.30 x̃: 2
helped stats (rel) min: 4.76% max: 25.00% x̄: 12.35% x̃: 11.11%
95% mean confidence interval for instructions value: -2.40 -2.19
95% mean confidence interval for instructions %-change: -12.99% -11.71%
Instructions are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978>
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga cd094f7dbb broadcom/compiler: fix num_textures for precompiled shaders
Some shaders use N textures but not bind these in consecutive
slots, so then we find texture accesses to indices that exceed the
number of textures and we assert crash. This happens with various
shaders from shader-db.

Fix that by looking at the largest binding used in the shader
and using that as the number of textures used.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978>
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga 989cfb6035 v3d: fix array_len when precompiling outputs for shader-db
Since 68c54c994a glsl_get_length returns the number of
vector elements for vectors, which is not what we want here.

This was causing us to blow up the number of output variables
during shader-db runs, causing all kinds of problems.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978>
2024-05-09 09:29:44 +02:00
Iago Toral Quiroga ae7f20d8d4 broadcom/compiler: assert on array overflow
If a shader has too may outputs overflowing the array may
overwrite other pieces of state, which can then be tricky to
debug.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28978>
2024-05-09 09:29:44 +02:00
Samuel Pitoiset c6a22dd05c radv: precompute NGG register values
To make emission faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29031>
2024-05-09 06:29:29 +00:00
Samuel Pitoiset 751e5d8bd7 radv: move common registers between VS/GS and NGG
For more clarity.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29031>
2024-05-09 06:29:29 +00:00
Faith Ekstrand 69b0ee7b6c spirv: Get rid of the old caps struct
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
2024-05-09 01:14:23 +00:00
Faith Ekstrand e80d52223e microsoft: Use spirv_capabilities for spirv_to_dxil
Note: This change doesn't actually affect dozen a it uses
vk_shader_module_to_nir() so caps will be exposed based on Vulkan
features rather than the manual table.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28905>
2024-05-09 01:14:23 +00:00