fb81201a34
agx: implement active_subgroup_invocation_agx
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
311070f7af
nir: add active_subgroup_invocation_agx sysval
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
da924e2f03
agx: fuse ballot+cmp
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
def00f7bf0
agx: introduce ballot pseudo
...
for more opts
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
92dcf75fcd
agx: lower more subgroups
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
f52e0bd70b
agx: implement load_subgroup_invocation
...
There's an sr.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
6f7511b522
asahi: decode uniform_high records
...
print them like low uniforms.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
1ee9b8b668
asahi: optimize more when linking libagx
...
Otherwise we get spurious scratch from lower_vars_to_explicit_types on dead
vars.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
9287bec892
asahi: fix unbound ssbos
...
fixes null ptr dereference in arb_shader_storage_buffer_object-array-ssbo-binding
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
3a6083dea3
asahi: enable robustness
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
591ce607e0
asahi: implement reset queries
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
5dc0f5ccba
asahi: implement VBO robustness
...
GL semantics. GLES (weaker) and VK (stronger) semantics are left as a todo, with
explanations given. Enabled always to deal with null VBOs, this should be
optimized once we have soft fault.
This necessitates a rework of VBO keys, but hopefully for the best.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:29 +00:00
4aadf67523
asahi: fix metadata for images with VS lowered to GS
...
KHR-GL46.shader_image_load_store.basic-allTargets-atomicVS
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:28 +00:00
9753cd44f7
asahi: Implement skeleton for tessellation
...
This implements a rough skeleton of what's needed for tessellation. It contains
the relevant lowerings to merge the VS and TCS, running them as a compute
kernel, and to lower the TES to a new VS (possibly merged in with a subsequent
GS). This is sufficient for both standalone tessellation and tess + geom/xfb
together. It does not yet contain a GPU accellerated tessellator, simply falling
back to the CPU for that for now. Nevertheless the data structures are
engineered with that end goal in mind, in particular to be able to tessellate
all patches in parallel without needing any prefix sums etc (using simple
watermark allocation for the heap).
Work on fleshing out the skeleton continues in parallel. For now, this does pass
the tests and lets the harder stuff get regression tested more easily. And
merging early will ease rebase.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:28 +00:00
2d37d1b704
asahi: lower poly stipple
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:28 +00:00
2d913892b2
asahi: gut macOS related code
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:28 +00:00
5e8168f1b7
asahi: add more uapi stubs
...
for scratch
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:28 +00:00
db144685a9
compiler: add a vs.tes_agx bit
...
So we can distinguish lowered tess eval shaders masquerading as hardware vertex
shaders from actual software vertex shaders, for determining what stage to pull
descriptors.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616 >
2024-02-14 21:02:28 +00:00
c6e855b64b
intel/compiler: Verify SIMD16 is used for xe2 BTD/RT dispatch
...
Ref: HSD 14011192593
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27529 >
2024-02-14 20:07:13 +00:00
820e04ead4
intel/compiler: Implement nir_intrinsic_load_topology_id_intel for xe2
...
Rework:
* Sagar: Rework BRW_TOPOLOGY_ID_DSS, BRW_TOPOLOGY_ID_EU_THREAD_SIMD
calculations
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27529 >
2024-02-14 20:07:13 +00:00
8f880d0ad7
intel/dev: Update max_subslices_per_slice comment
...
Mention that max_subslices_per_slice relates to GT_SS_PER_SLICE in SKU.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27529 >
2024-02-14 20:07:13 +00:00
b533bf7361
intel/compiler: Set branch shader required-width as 16 for xe2
...
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27529 >
2024-02-14 20:07:13 +00:00
5022e5f4bf
iris: Fix iris_batch_is_banned() check
...
iris_batch_is_banned() expects that errno is negative.
Fixes: 665d30b544paulo.r.zanoni@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27619 >
2024-02-14 19:43:55 +00:00
460d2c46a9
mesa: fix off-by-one for newblock allocation in dlist_alloc
...
Cc: mesa-stable
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27556 >
2024-02-14 18:11:49 +00:00
4423454daa
intel/common: Implement xe_engines_is_guc_semaphore_functional()
...
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
ac941b13f1
intel: Sync xe_drm.h
...
Sync xe_drm.h with 9bc36e58d162 ("drm/xe: Add uAPI to query GuC firmware submission version").
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
dff96257da
intel/common: Implement i915_engines_is_guc_semaphore_functional()
...
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
731121c982
intel: Sync i915_drm.h
...
Sync i915_drm.h with commit b11236486749 ("drm/i915: Add GuC submission interface version query").
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
0a129d8e1f
iris: Use intel_engines_supported_count()
...
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
29ee85c203
anv: Use intel_engines_supported_count()
...
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
fe2982278f
intel/common: Add intel_engines_supported_count()
...
This function is intented to check for KMD, platform or debug options
and return the number of engines that can actually be used.
Next patches will implement i915/xe_engines_is_guc_semaphore_functional()
functions.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
ffca423472
intel: Remove circular dependency between intel/dev and intel/common
...
intel/common has a build dependency on intel/dev so the later should
not have any dependendies on the first.
So here moving the definition of intel_engine_class to
intel_device_info.h because it is used in intel_device_info struct
and then including intel_device_info.h in intel_engine.h.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
6b5c446556
intel/common: Fix location of C++ support macro in intel_gem.h
...
'extern "C" {' must be added before any includes otherwise the braces
would not match when 'extern "C" {' is defined in other headers.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
398bdb46ba
anv: Drop include to common/i915/intel_gem.h
...
Common code should not directly include KMD specific files.
At least there was no usage from symbols defined in this file.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25233 >
2024-02-14 17:29:54 +00:00
e136a0629d
radv/gfx11+: add rtwave32 perftest option
...
Useful for testing compiler changes and performance considerations.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27584 >
2024-02-14 17:11:01 +00:00
90eae30bcb
rusticl/mem: move pipe_image_host_access into Image
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
9ce9ddc5e8
rusticl/mem: reorganize MemBase::from_gl a little
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
b834d41d4b
rusticl/mem: move Buffer and Image specific fields into the subtypes
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
cf73ac8096
rusticl/mem: move tx_raw_async methods into Buffer and Image
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
f9b05dfd77
rusticl/mem: move MemBase::map into the users
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
d3c3892088
rusticl/mem: reorganize Image::map
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
97680ca861
rusticl/mem: move comment describing how mapping works
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
a9a928cbf9
rusticl/mem: remove get_res
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
687dea4fde
rusticl/mem: move tx into Buffer
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
d18333889e
rusticl/mem: move is_parent_buffer into Image
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
bfa342e16e
rusticl/image: call tx on the parent buffer directly
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
6a15d5baee
rusticl/mem: fold tx_raw into tx
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
790d00d3e1
rusticl/mem: move tx_image into Image
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
e39b6288f6
rusticl/mem: get rid of pixel_size
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
2db23aa207
rusticl/mem: split Image::copy_to into Buffer and Image versions
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27376 >
2024-02-14 14:15:39 +00:00
Alyssa Rosenzweig