Commit Graph

186467 Commits

Author SHA1 Message Date
Alyssa Rosenzweig aae0c1d5a8 asahi,hk: reenable rgb32 buffer textures
Apparently Direct3D has this. Boo :'(

This reverts commit 049808630e.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig 02d4f49bcd agx: gather workgroup size
deduplicate this.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig f4bd5466ee agx: vectorize scratch access
can help a lot for scratchy shaders. affected shader is a compute shader in
graphics bench.

total instructions in shared programs: 2751334 -> 2750950 (-0.01%)
instructions in affected programs: 4308 -> 3924 (-8.91%)
helped: 2
HURT: 0

total bytes in shared programs: 21482512 -> 21480592 (<.01%)
bytes in affected programs: 27448 -> 25528 (-7.00%)
helped: 2
HURT: 0

total fills in shared programs: 732 -> 540 (-26.23%)
fills in affected programs: 396 -> 204 (-48.48%)
helped: 2
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig e99418919c asahi/clc: drop getopt
I don't think it's buying us anything anymore.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig a1fe60fd98 asahi/decode: disasm 3D helper progs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig b001d68c69 asahi: drop desc align alloc
might bring it back later idk we'll see.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig ae8e45e19c asahi,agx: move texture lowering into the compiler
this untangles things for precomp.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig 2c17df7010 asahi: drop dead ACCESS
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig c602832471 libagx: DCE
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
Alyssa Rosenzweig 6aad96f6cd libagx: move out of lib/
make the hierarchy saner.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
2024-11-24 13:06:08 +00:00
liuqiang 82e68de681 lavapipe: Resolved write to pointer after free
Write to "alloc" pointer variable after free "alloc"

Fixes: d74ea2c117 ("llvmpipe: Implement dmabuf handling")

Signed-off-by: liuqiang <liuqiang@kylinos.cn>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32292>
2024-11-24 06:11:40 +00:00
Karol Herbst 6088a4373c rusticl/mesa: make driver_name() return a &CStr
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32253>
2024-11-23 11:29:18 +00:00
Karol Herbst 4750619491 rusticl/kernel: convert name and type_name to Option<CString>
This also lets us throw CL_KERNEL_ARG_INFO_NOT_AVAILABLE easily on non
existing metadata.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32253>
2024-11-23 11:29:18 +00:00
Karol Herbst 813edb6cea rusticl: check for overrun status when deserializing
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32253>
2024-11-23 11:29:18 +00:00
Mike Lothian 3aa7497cc0 gallium/radeon: Fix r600_pci_ids.h include
The new location is pci_ids/r600_pci_ids.h

Fixes: 1299f5c50a ("gallium/radeon: import libdrm_radeon source code, drop the dependency")
Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32298>
2024-11-23 02:35:57 +00:00
Alyssa Rosenzweig 41958cfc73 libagx: switch to vtn_bindgen
this splits out our headers properly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32226>
2024-11-22 23:04:17 +00:00
Alyssa Rosenzweig 0b588506ff vtn: introduce vtn_bindgen tool
This is a small command line utility to generate NIR bindings for a SPIR-V
library, using vtn's infrastructure for this. This is split out from asahi_clc
in an effort to make clc more modular. Notably, this tool does not depend on:

* LLVM, SPIRV-LLVM, CLC, etc (important for Android, and gets us closer to the
  clang spir-v future)
* Driver details other than addressing modes (which are already largely
  hardcoded, setting them to anything else doesn't make a ton of sense for CL C)
* The driver itself, or its backend compiler. That means that the backend
  compiler can depend on the generated bindings header, even if the compiler is
  also used for internal shader precompiling. This breaks the dep loop.

So in short term, this solves the dependency problem for asahi, and in the long
term helps more drivers use clc infrastructure without re-rolling things
themselves.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32226>
2024-11-22 23:04:17 +00:00
Alyssa Rosenzweig 6874c4f516 nir: add nir_fixup_is_exported pass
See comment in the pass for motivation. To be used for asahi clc.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32226>
2024-11-22 23:04:17 +00:00
Caio Oliveira 0c0b61b029 intel/brw: Dump IR after lower scoreboard pass
Acked-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32269>
2024-11-22 21:47:46 +00:00
Caio Oliveira 90343f452d intel/brw: Fix SWSB output when printing IR
The printing routine was ignoring dependencies that
were only unordered.

Acked-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32269>
2024-11-22 21:47:46 +00:00
Caio Oliveira 1d704af515 intel/brw: Fix decoding of cond_modifier and saturate in EU validation
These fields are only valid in certain formats, so set them accordingly.
Note the check if !is_send is used because FORMAT_BASIC is reused for
SEND/SENDS in some platforms.  If we start to see more cases like that,
we can create a new FORMAT for it.

The cond_modifier is trickier because on top of that, it is not valid
for 64-bit immediates in some platforms.  Found when EU validation
complained about moving 64-bit immediates with higher bits.

Fixes: e4440df2d8 ("intel/brw: Add pred/cmod/sat to brw_hw_decoded_inst")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32287>
2024-11-22 21:15:46 +00:00
Eric Engestrom 480fcf7aff radv/ci: document regression of test_shader_sm66_is_helper_lane in 7469f99e...25b8f4f7
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32309>
2024-11-22 20:49:52 +00:00
Nanley Chery 385080fb92 intel: Allow CCS on 3D surfaces for gfx120
According to HSD 1406738321, full resolves and fast-clears don't work
properly on 3D textures. Up until now, we've disabled CCS for this case.
Instead, redescribe the surface as 2-dimensional to perform auxiliary
surface operations.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31880>
2024-11-22 20:11:43 +00:00
Nanley Chery 84208d514e intel/isl: Allow CCS on 3D 64bpp+ Tile64
The restriction is incorrectly tagged for gfx12.5.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31880>
2024-11-22 20:11:43 +00:00
Nanley Chery e32203827a intel/blorp: Assert 3D Ys fast-clear restriction
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31880>
2024-11-22 20:11:43 +00:00
Chia-I Wu 4d35002949 panvk: expand top-of-pipe and bottom-of-pipe
Use vk_expand_src_stage_flags2 and vk_expand_dst_stage_flags2, instead
of vk_expand_pipeline_stage_flags2, to expand bottom-of-pipe and
top-of-pipe respectively.

Fixes: 5544d39f44 ("panvk: Add a CSF backend for panvk_queue/cmd_buffer")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32289>
2024-11-22 19:46:35 +00:00
Caio Oliveira 9383a62d95 intel/executor: Enable PTL
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32196>
2024-11-22 10:26:12 -08:00
Derek Foreman 2e49448a43 vulkan/wsi/wayland: Move timing calculations to the swapchain
When we create a new swapchain to replace the one currently presenting on
a surface, we need to reset all these timing variables. Otherwise we can
lose track of corrections that were made for the old swapchain when we
delete undelivered presentation feedback results.

Also, we use these variables when queuing a presentation, but we also use
them in the dispatch code that can be called by WaitForPresent from another
thread. We need to protect these variables against concurrent usage.

This is all much easier to do when they're stored as part of the swapchain
instead of the surface, so just move them there and adjust the locking.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Fixes: c26ab1aee1 ("vulkan/wsi/wayland: Pace frames with commit-timing-v1")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32121>
2024-11-22 15:50:35 +00:00
Derek Foreman b9c8afae33 vulkan/wsi/wayland: Avoid spurious discard event at startup
When we start using timestamps, the current code will generate an event
stream like:

feedback
set barrier
wait barrier
commit

feedback
set timestamp
set barrier
commit

wait barrier
commit

The second content update can cause the feedback request from the first to
send a discarded event if the timestamp is in the past.

Be less clever and just put waits in both our content updates.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Fixes: c26ab1aee1 ("vulkan/wsi/wayland: Pace frames with commit-timing-v1")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32121>
2024-11-22 15:50:35 +00:00
Derek Foreman ed2bb692f7 vulkan/wsi/wayland: Fix time calculation
When occluded, the current math always rounds down to 0 cycles and leads
to improperly throttled frame delivery.

Improve the comment, and use a formula that leads to generating future
times even when occluded.

Also remove some dead code, as we can never get here with a period of 0.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Fixes: c26ab1aee1 ("vulkan/wsi/wayland: Pace frames with commit-timing-v1")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32121>
2024-11-22 15:50:34 +00:00
Boris Brezillon f1665024b8 panvk/ci: Update CI expectations to have a green CI
Update just enough of the fail list to have a green CI. I'm sure a
no-fraction run would uncover other improvements/failures/flakes, but
the goal here is to detect improvements/regressions introduced by new
MRs, not to make the list accurate. This will be tackled in a follow-up
MR.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32302>
2024-11-22 15:00:51 +00:00
David Rosca 12fff8005a frontends/va: Enable 3-plane YUV formats as postproc output
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32252>
2024-11-22 14:29:53 +00:00
David Rosca 6c83f3c3bb gallium/vl: Don't support planar RGB as video format
We assume everywhere that RGB is not planar, so sampling
and color space conversions will not work correctly with RGBP.
Drivers can still support RGBP, but processing entrypoint with
shaders doesn't support it.

Fixes: bdb7f36aa8 ("frontends/va: add support for RGBP rt_format")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32252>
2024-11-22 14:29:53 +00:00
David Rosca 0f533b387c gallium/vl: Implement rendering to 3-plane YUV formats
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32252>
2024-11-22 14:29:53 +00:00
David Rosca 7d1ce3d802 frontends/va: Change default fourcc for RGB 10bit to X2R10G10B10
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32252>
2024-11-22 14:29:53 +00:00
David Rosca 3e3eb62cae frontends/va: Return correct pixel formats in surface attributes query
This matches the supported formats we query for in config attributes.
Also prefer YUY2 over YUYV (identical formats), as YUY2 has a VA_FOURCC_YUY2
definition and some applications will only try to use this fourcc code.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32252>
2024-11-22 14:29:53 +00:00
Eric Engestrom ad42be50c9 ci/deqp: fully isolate deqp builds
Since the builds can be from very different versions of the code, we
need to make sure the common bits are compiled from the correct code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32250>
2024-11-22 10:16:49 +00:00
Eric Engestrom 55eb200e81 zink+radv/ci: fix deqp binary used for gles tests
I did half the job in that commit: I split the two apis into two
invocations, but I didn't fix the binary used for the gles one...

Fixes: 14279087fb ("ci/deqp-runner: split gl & gles groups to use the correct binary")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32250>
2024-11-22 10:16:49 +00:00
Eric Engestrom 25bf8e9682 zink+nvk/ci: fix deqp binary used for gles tests
Fixes: 5a6ffd1420 ("zink/ci: add zink+nvk glcts+piglit job on a GA106 (RTX 3060)")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32250>
2024-11-22 10:16:49 +00:00
Daniel Schürmann bb87832ce0 aco/insert_NOPs: add early exit to handle_valu_partial_forwarding_hazard_instr
No need to continue if there was already a hazard found in
a different control flow path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32191>
2024-11-22 08:46:32 +00:00
Daniel Schürmann 07df37ba01 aco/insert_NOPs: use RegCounterMap as replacement for the CounterMap implementation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32191>
2024-11-22 08:46:32 +00:00
Daniel Schürmann fb5e5adfb3 aco/insert_NOPs: implement vector-based RegCounterMap as replacement for VGPRCounterMap
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32191>
2024-11-22 08:46:32 +00:00
Lionel Landwerlin b44faa22ab anv: document the X4 Foundations workaround a bit more
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32297>
2024-11-22 10:19:26 +02:00
Lionel Landwerlin 0fa3be44aa anv: add a workaround for X4 Foundations
This title incorrectly tries to allocate descriptor sets larger than
the number of sampler items in the descriptor pool.

Workaround by taking other largest item count in the descriptor pool
and use that for samplers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11795
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32285>
2024-11-22 06:44:34 +00:00
Lionel Landwerlin 14d8da4c3c anv: indent driconf code
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32285>
2024-11-22 06:44:34 +00:00
Lionel Landwerlin d483f7d984 anv: track allocated descriptor pool sizes
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lina Versace <lina@kiwitree.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32285>
2024-11-22 06:44:34 +00:00
Dave Airlie 25b8f4f714 venus: handle device probing properly.
Currently if you try to probe the virtio ICD on a non-virtio system
it will fail in CreateInstance which causes the loader to spit on the
screen.

However instance creation shouldn't fail, the driver should just
not enumerate any devices in this case. It's a bit tricky to ensure
this, but return instance and then handle instance destruction
and fail device enumeration.

Cc: mesa-stable
Reviewed-by: Ryan Neph
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32266>
2024-11-22 13:06:11 +10:00
Dave Airlie 0d15376647 v3dv: report correct error on failure to probe
When probing ICDs, the broadcom driver returns the wrong error code
which spews on the console instead of silently failing.

Cc: mesa-stable
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32266>
2024-11-22 13:05:57 +10:00
Caio Oliveira 3e2599d475 intel/brw: Use <V,W,H> notation for FIXED_GRF and ARF source when printing IR
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32260>
2024-11-21 17:36:34 -08:00
Caio Oliveira 71d362db66 intel/brw: Omit type and region in payload sources when printing IR
These are not really used since SEND messages deal with full GRFs.

Before

```
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 0u, g1:UD, g8:UD
send(8) (mlen: 1) g5:UD, 0u, 0u, g4:UD, (null):UD
send(8) (mlen: 1) (ex_mlen: 1) (null):UD, 0u, 16777216u, g1:D, g6:UD
send(8) (mlen: 1) (EOT) (null):UD, 0u, 0u, g126:UD, (null):UD NoMask
```

and after

```
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 0u, g1, g8
send(8) (mlen: 1) g5, 0u, 0u, g4, (null)
send(8) (mlen: 1) (ex_mlen: 1) (null), 0u, 16777216u, g1, g6
send(8) (mlen: 1) (EOT) (null), 0u, 0u, g126, (null) NoMask
```

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32259>
2024-11-22 00:50:40 +00:00