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asahi,hk: reenable rgb32 buffer textures

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Apparently Direct3D has this. Boo :'(

This reverts commit 049808630e.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32320>
This commit is contained in:
Alyssa Rosenzweig
2024-11-23 20:04:01 -05:00
committed by Marge Bot
parent 02d4f49bcd
commit aae0c1d5a8
7 changed files with 29 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/asahi/compiler/agx_nir.h
+1 -1
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@@ -24,6 +24,6 @@ bool agx_nir_lower_subgroups(struct nir_shader *s);
bool agx_nir_lower_fminmax(struct nir_shader *s);
bool agx_nir_lower_texture_early(struct nir_shader *s, bool support_lod_bias);
bool agx_nir_lower_texture(struct nir_shader *s, bool support_rgb32);
bool agx_nir_lower_texture(struct nir_shader *s);
bool agx_nir_lower_multisampled_image_store(struct nir_shader *s);
bool agx_nir_needs_texture_crawl(struct nir_instr *instr);
src/asahi/compiler/agx_nir_lower_texture.c
+18 -28
View File
@@ -131,7 +131,7 @@ coords_for_buffer_texture(nir_builder *b, nir_def *coord)
* return txf(texture_as_2d, vec2(x % 1024, x / 1024));
*/
static bool
lower_buffer_texture(nir_builder *b, nir_tex_instr *tex, bool support_rgb32)
lower_buffer_texture(nir_builder *b, nir_tex_instr *tex)
{
nir_def *coord = nir_steal_tex_src(tex, nir_tex_src_coord);
nir_def *size = nir_get_texture_size(b, tex);
@@ -151,19 +151,14 @@ lower_buffer_texture(nir_builder *b, nir_tex_instr *tex, bool support_rgb32)
/* Lower RGB32 reads if the format requires. If we are out-of-bounds, we use
* the hardware path so we get a zero texel.
*/
nir_if *nif = NULL;
nir_def *rgb32 = NULL;
if (support_rgb32) {
nif = nir_push_if(
b, nir_iand(b, libagx_texture_is_rgb32(b, desc), nir_inot(b, oob)));
nir_if *nif = nir_push_if(
b, nir_iand(b, libagx_texture_is_rgb32(b, desc), nir_inot(b, oob)));
rgb32 = nir_trim_vector(
b,
libagx_texture_load_rgb32(b, desc, coord, nir_imm_bool(b, is_float)),
nir_tex_instr_dest_size(tex));
nir_def *rgb32 = nir_trim_vector(
b, libagx_texture_load_rgb32(b, desc, coord, nir_imm_bool(b, is_float)),
nir_tex_instr_dest_size(tex));
nir_push_else(b, nif);
}
nir_push_else(b, nif);
/* Otherwise, lower the texture instruction to read from 2D */
assert(coord->num_components == 1 && "buffer textures are 1D");
@@ -175,19 +170,15 @@ lower_buffer_texture(nir_builder *b, nir_tex_instr *tex, bool support_rgb32)
nir_tex_instr_add_src(tex, nir_tex_src_backend1, coord2d);
nir_steal_tex_src(tex, nir_tex_src_sampler_handle);
nir_steal_tex_src(tex, nir_tex_src_sampler_offset);
nir_block *else_block = nir_cursor_current_block(b->cursor);
nir_pop_if(b, nif);
if (support_rgb32) {
nir_block *else_block = nir_cursor_current_block(b->cursor);
nir_pop_if(b, nif);
/* Put it together with a phi */
nir_def *phi = nir_if_phi(b, rgb32, &tex->def);
nir_def_rewrite_uses(&tex->def, phi);
nir_phi_instr *phi_instr = nir_instr_as_phi(phi->parent_instr);
nir_phi_src *else_src = nir_phi_get_src_from_block(phi_instr, else_block);
nir_src_rewrite(&else_src->src, &tex->def);
}
/* Put it together with a phi */
nir_def *phi = nir_if_phi(b, rgb32, &tex->def);
nir_def_rewrite_uses(&tex->def, phi);
nir_phi_instr *phi_instr = nir_instr_as_phi(phi->parent_instr);
nir_phi_src *else_src = nir_phi_get_src_from_block(phi_instr, else_block);
nir_src_rewrite(&else_src->src, &tex->def);
return true;
}
@@ -199,7 +190,6 @@ lower_buffer_texture(nir_builder *b, nir_tex_instr *tex, bool support_rgb32)
static bool
lower_regular_texture(nir_builder *b, nir_instr *instr, UNUSED void *data)
{
bool *support_rgb32 = data;
if (instr->type != nir_instr_type_tex)
return false;
@@ -210,7 +200,7 @@ lower_regular_texture(nir_builder *b, nir_instr *instr, UNUSED void *data)
return false;
if (tex->sampler_dim == GLSL_SAMPLER_DIM_BUF)
return lower_buffer_texture(b, tex, *support_rgb32);
return lower_buffer_texture(b, tex);
/* Don't lower twice */
if (nir_tex_instr_src_index(tex, nir_tex_src_backend1) >= 0)
@@ -756,7 +746,7 @@ agx_nir_lower_texture_early(nir_shader *s, bool support_lod_bias)
}
bool
agx_nir_lower_texture(nir_shader *s, bool support_rgb32)
agx_nir_lower_texture(nir_shader *s)
{
bool progress = false;
@@ -793,7 +783,7 @@ agx_nir_lower_texture(nir_shader *s, bool support_rgb32)
* generates txs for array textures).
*/
NIR_PASS(progress, s, nir_shader_instructions_pass, lower_regular_texture,
nir_metadata_none, &support_rgb32);
nir_metadata_none, NULL);
NIR_PASS(progress, s, nir_shader_instructions_pass, lower_tex_crawl,
nir_metadata_control_flow, NULL);
src/asahi/lib/agx_bg_eot.c
+2 -2
View File
@@ -32,14 +32,14 @@ agx_compile_bg_eot_shader(struct agx_bg_eot_cache *cache, nir_shader *shader,
struct agx_shader_key *key,
struct agx_tilebuffer_layout *tib)
{
agx_nir_lower_texture(shader, false);
agx_nir_lower_texture(shader);
agx_preprocess_nir(shader, cache->dev->libagx);
if (tib) {
unsigned bindless_base = 0;
agx_nir_lower_tilebuffer(shader, tib, NULL, &bindless_base, NULL, NULL);
agx_nir_lower_monolithic_msaa(shader, tib->nr_samples);
agx_nir_lower_multisampled_image_store(shader);
agx_nir_lower_texture(shader, false);
agx_nir_lower_texture(shader);
nir_shader_intrinsics_pass(shader, lower_tex_handle_to_u0,
nir_metadata_control_flow, NULL);
src/asahi/lib/agx_nir_prolog_epilog.c
+1 -1
View File
@@ -436,7 +436,7 @@ agx_nir_fs_epilog(nir_builder *b, const void *key_)
unsigned rt_spill = key->link.rt_spill_base;
NIR_PASS(_, b->shader, agx_nir_lower_tilebuffer, &tib, colormasks, &rt_spill,
write_samples, &force_translucent);
NIR_PASS(_, b->shader, agx_nir_lower_texture, false);
NIR_PASS(_, b->shader, agx_nir_lower_texture);
NIR_PASS(_, b->shader, agx_nir_lower_multisampled_image_store);
/* If the API shader runs once per sample, then the epilog runs once per
src/asahi/vulkan/hk_buffer_view.c
+4 -6
View File
@@ -36,13 +36,11 @@ hk_get_buffer_format_features(struct hk_physical_device *pdev,
if (ail_pixel_format[p_format].texturable &&
!util_format_is_depth_or_stencil(p_format)) {
/* Only power-of-two supported by hardware. We have common RGB32 emulation
* code for GL, but we don't want to use it for VK as it has a performance
* cost on every buffer view load.
*/
features |= VK_FORMAT_FEATURE_2_UNIFORM_TEXEL_BUFFER_BIT;
/* RGB32 specially supported for uniform texel buffers only. */
if (util_is_power_of_two_nonzero(util_format_get_blocksize(p_format))) {
features |= VK_FORMAT_FEATURE_2_UNIFORM_TEXEL_BUFFER_BIT |
VK_FORMAT_FEATURE_2_STORAGE_TEXEL_BUFFER_BIT |
features |= VK_FORMAT_FEATURE_2_STORAGE_TEXEL_BUFFER_BIT |
VK_FORMAT_FEATURE_2_STORAGE_WRITE_WITHOUT_FORMAT_BIT;
}
src/asahi/vulkan/hk_shader.c
+1 -1
View File
@@ -724,7 +724,7 @@ hk_lower_nir(struct hk_device *dev, nir_shader *nir,
nir_metadata_control_flow, NULL);
}
NIR_PASS(_, nir, agx_nir_lower_texture, false);
NIR_PASS(_, nir, agx_nir_lower_texture);
NIR_PASS(_, nir, agx_nir_lower_multisampled_image_store);
agx_preprocess_nir(nir, dev->dev.libagx);
src/gallium/drivers/asahi/agx_state.c
+2 -2
View File
@@ -1874,7 +1874,7 @@ agx_shader_initialize(struct agx_device *dev, struct agx_uncompiled_shader *so,
.callback = agx_mem_vectorize_cb,
});
NIR_PASS(_, nir, agx_nir_lower_texture, true);
NIR_PASS(_, nir, agx_nir_lower_texture);
NIR_PASS(_, nir, nir_lower_ssbo, NULL);
agx_preprocess_nir(nir, dev->libagx);
@@ -2643,7 +2643,7 @@ agx_build_meta_shader_internal(struct agx_context *ctx,
nir_address_format_62bit_generic);
agx_preprocess_nir(b.shader, NULL);
NIR_PASS(_, b.shader, agx_nir_lower_texture, true);
NIR_PASS(_, b.shader, agx_nir_lower_texture);
NIR_PASS(_, b.shader, agx_nir_lower_multisampled_image_store);
}