Commit Graph

28 Commits

Author SHA1 Message Date
Kenneth Graunke 6281a12822 brw: Remove brw_inst::no_dd_check/no_dd_clear
These dependency hints were primarily useful for the vec4 backend, where
it was common to write subsets of a vec4's components across multiple
instructions.  In the scalar backend, we rarely used them.  They also no
longer exist on Tigerlake and later in favor of software scoreboarding.

Dropping this allows us to clean up the IR a bit.

We still use the hardware hints in the generator in a couple places:

   - Gfx9-12.0 scratch headers
   - Quad swizzles
   - Indirect MOV lowering

In theory we might want them back if we moved that lowering to the IR.
For scratch at least, I suspect it won't have a huge impact, as we're
already incurring the cost of spills/fills.  The others are fairly rare
as well, so it may not be worth keeping.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36730>
2025-09-12 00:24:55 +00:00
Kenneth Graunke b848fa4595 brw: Rename is_send_from_grf to is_send, replace other is_send() helper
The is_send() helper is just a wrapper around inst->is_send_from_grf()
now, so we can combine the two.  Trim the name from is_send_from_grf()
to is_send(), as it's shorter, and also matches is_math().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34040>
2025-08-08 22:12:05 +00:00
Marek Olšák db26597f8d intel: fork exec_node/list -> brw_exec_node/list as a private Intel utility
NIR is going to use exec_node/list without the C++ code, and may switch to
a different linked list implementation in the future.

GLSL is going to use ir_exec_node/list, which we want to keep private
for GLSL, so that we can change it easily.

Thus, it's better to fork the C++ version of list.h for Intel.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36425>
2025-07-31 20:23:02 +00:00
Ian Romanick 1279f12c84 brw: Implement Wa_22012725308 for flags via SWSB too
At this point, using the per-register granularity will only help in
conjuction with fragment shader discard (which is implemented using f1).

v2: Loop restructuring and code cleanups. Suggested by Curro.

v3: Only apply Wa on Gfx12.5+. Suggested by Curro.

v4: Also apply to implicit flag reads. Suggested by Curro. This version
affects a *lot* more shaders (10,936 on Meteor Lake shader-db versus
4,482 before). The results are still very much in the 🤷 territory.

v5: Add missing dependency. I thought I got them all the previous
time. :( Noticed by Curro.

shader-db:

Lunar Lake
total cycles in shared programs: 886315282 -> 886391040 (<.01%)
cycles in affected programs: 204907250 -> 204983008 (0.04%)
helped: 1 / HURT: 6716

LOST:   0
GAINED: 1

Meteor Lake and DG2 had similar results. (Meteor Lake shown)
total cycles in shared programs: 883774789 -> 883921507 (0.02%)
cycles in affected programs: 481836784 -> 481983502 (0.03%)
helped: 4 / HURT: 10936

LOST:   3
GAINED: 7

fossil-db:

Lunar Lake
Totals:
Cycle count: 32600441334 -> 32601862658 (+0.00%); split: -0.00%, +0.00%

Totals from 90283 (11.44% of 789260) affected shaders:
Cycle count: 17265933202 -> 17267354526 (+0.01%); split: -0.00%, +0.01%

Meteor Lake and DG2 had similar results. (Meteor Lake shown)
Totals:
Cycle count: 26477292677 -> 26480321805 (+0.01%); split: -0.00%, +0.01%
Max dispatch width: 8010440 -> 8010984 (+0.01%)

Totals from 132952 (14.71% of 903925) affected shaders:
Cycle count: 15349555348 -> 15352584476 (+0.02%); split: -0.00%, +0.02%
Max dispatch width: 1085416 -> 1085960 (+0.05%)

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35415>
2025-07-24 23:08:07 +00:00
Ian Romanick 1fdcc9039b brw: Add and use brw_reg_is_arf to test for a specific ARF
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35415>
2025-07-24 23:08:07 +00:00
Caio Oliveira f8db53ccae brw: Fix comparison with unordered_mode when making baked dependency
The unordered mode stored in dependencies might be a bitmask and not
only a single mode.  In practice, only the "stronger" mode will stick.
Make sure that the code testing for the mode uses "&" instead of "==",
to avoid prevent some valid combinations to happen, e.g.

```
   // ...
   add(16)         g104<1>F        g94<1,1,0>F     g34<1,1,0>F     { align1 1H @7 $7.dst compacted };
```

which without the fix ends up as

```
   // ...
   sync nop(1)                     null<0,1,0>UB                   { align1 WE_all 1N F@7 };
   add(16)         g104<1>F        g94<1,1,0>F     g34<1,1,0>F     { align1 1H $7.dst compacted };
```

Enables two tests for the scoreboard pass that illustrate this case.

For measuring the effect, re-enabled the sync.nop accounting on total of
instructions and got the following results.

```
   Totals:
   Instrs: 322041261 -> 321748285 (-0.09%)
   Cycle count: 22864587567 -> 22863073741 (-0.01%)
   Max dispatch width: 7989040 -> 7989024 (-0.00%); split: +0.00%, -0.00%

   Totals from 88212 (9.78% of 902056) affected shaders:
   Instrs: 102282050 -> 101989074 (-0.29%)
   Cycle count: 12787629859 -> 12786116033 (-0.01%)
   Max dispatch width: 525336 -> 525320 (-0.00%); split: +0.01%, -0.01%
```

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36096>
2025-07-14 20:28:54 +00:00
Caio Oliveira 6509f8139d brw: Use brw_range::last() to explicit get the last valid IP
This is a preparation to change what is stored in brw_range::end.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira f56a5cf1eb brw: Use brw_range in IP ranges analysis
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34253>
2025-04-09 19:06:49 +00:00
Caio Oliveira 7ae638c0fe brw: Add brw_builder::uniform()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34355>
2025-04-04 23:07:21 +00:00
Caio Oliveira 81dd3e1527 brw: Return actual progress in brw_lower_scoreboard
This will be useful later for tests to be used in conjunction with the
EXPECT_PROGRESS / EXPECT_NO_PROGRESS helpers.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34354>
2025-04-04 20:14:53 +00:00
Caio Oliveira 3659d36087 brw: Use brw_ip_ranges in passes
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Caio Oliveira fd6045cca9 brw: Track total_instructions in a shader
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34012>
2025-03-29 00:25:50 +00:00
Caio Oliveira e37b707bd0 brw: Consider bfloat16 in scoreboard
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33664>
2025-03-25 05:23:37 +00:00
Caio Oliveira d1f4fb8eee brw: Make some integer check more explicit
Use the positive ("is int?") check when applicable.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33664>
2025-03-25 05:23:37 +00:00
Caio Oliveira 32e562ae01 brw: Simplify brw_builder "insert before inst" constructor
Since brw_inst now has the block it belongs and the block can
reach the shader, the only necessary information to create a
builder is the brw_inst itself.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33815>
2025-03-06 23:33:38 +00:00
Caio Oliveira d2c39b1779 intel/brw: Always have a (non-DO) block after a DO in the CFG
Make the "block after DO" more stable so that adding instructions after
a DO doesn't require repairing the CFG.  Use a new SHADER_OPCODE_FLOW
instruction that is a placeholder representing "go to the next block"
and disappears at code generation.

For some context, there are a few facts about how CFG currently works

- Blocks are assumed to not be empty;
- DO is always by itself in a block, i.e. starts and ends a block;
- There are no empty blocks;
- Predicated WHILE and CONTINUE will link to the "block after DO";
- When nesting loops, it is possible that the "block after DO" is
  another "DO".

Reasons and further explanations for those are in the brw_cfg.c comments.

What makes this new change useful is that a pass might want to add
instructions between two DO instructions.  When that happens, a new
block must be created and any predicated WHILE and CONTINUE must be
repaired.

So, instead of requiring a repair (which has proven to be tricky in
the past), this change adds a block that can be "virtually" empty but
allow instructions to be added without further changes.

One alternative design would be allowing empty blocks, that would be
a deeper change since the blocks are currently assumed to be not empty
in various places.  We'll save that for when other changes are made to
the CFG.

The problem described happens in brw_opt_combine_constants, and a
different patch will clean that up.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33536>
2025-02-24 23:25:06 +00:00
Caio Oliveira cf3bb77224 intel/brw: Rename fs_visitor to brw_shader
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
2025-02-11 09:13:28 +00:00
Caio Oliveira 352a63122f intel/brw: Rename files brw_fs.cpp/h to brw_shader.cpp/h
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32536>
2025-02-11 09:13:28 +00:00
Caio Oliveira ea87bab4ce intel/brw: Remove 'using namespace brw' directives
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33418>
2025-02-06 07:58:55 -08:00
Caio Oliveira d59bd421a2 intel/brw: Rename fs_inst to brw_inst
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33114>
2025-01-31 00:57:21 +00:00
Caio Oliveira 00fac79f99 intel/brw: Add scoreboard support for scalar register
Xe3 adds a new pipe that handles *only* MOVs from immediate into the
scalar register.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32410>
2025-01-30 04:43:57 +00:00
Francisco Jerez a67ff3e7e3 intel/brw/xe3+: Bump number of SBID tokens for Xe3.
Xe3 supports 32 SBID tokens per thread regardless of the number of
register blocks allocated per thread.  Take advantage of the increased
number of SBIDs in the scoreboard pass to reduce the frequency of
false dependencies on Xe3+.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32664>
2025-01-29 23:39:32 +00:00
Francisco Jerez ca1636d457 intel/brw/xe3: Define XE3_MAX_GRF.
Gfx30 supports up to 256 (512b) GRFs which requires a max GRF define
of 512 in REG_SIZE units.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32664>
2025-01-29 23:39:32 +00:00
Caio Oliveira 5ac82efd35 intel/brw: Rename fs_builder to brw_builder
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33076>
2025-01-18 16:12:55 +00:00
Caio Oliveira f2d4c9db92 intel/brw: Rename brw_fs_builder.h to brw_builder.h
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33076>
2025-01-18 16:12:54 +00:00
Caio Oliveira 868016d92c intel/brw/xe2+: Do not use $.dst or $.src SWSB annotations in SENDs
When a SEND instruction is a EOT, the scoreboard lowering will not
allocate a new SBID for it, since nothing needs to wait for it.  In
Gfx12 this allowed the SEND to get out-of-order $.dst or $.src
dependencies.

Starting on Xe2+ this is not supported anymore, in favor of supporting
more combined modes.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32712>
2025-01-07 22:23:59 +00:00
Caio Oliveira e1aebf8a0c intel/brw: Remove 'fs' prefix from passes and related functions
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32813>
2025-01-02 18:11:05 +00:00
Caio Oliveira 25384dccc0 intel/brw: Remove 'fs' prefix from passes filenames
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32813>
2025-01-02 18:11:05 +00:00