radv: add radv_pipeline_get_shader_key()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
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Samuel Pitoiset
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Marge Bot
Marge Bot
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844004c335
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ffe997d71d
@@ -143,76 +143,85 @@ radv_convert_buffer_robustness(const struct radv_device *device, VkPipelineRobus
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}
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}
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struct radv_pipeline_key
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radv_generate_pipeline_key(const struct radv_device *device, const VkPipelineShaderStageCreateInfo *stages,
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const unsigned num_stages, VkPipelineCreateFlags2KHR flags, const void *pNext)
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struct radv_shader_stage_key
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radv_pipeline_get_shader_key(const struct radv_device *device, const VkPipelineShaderStageCreateInfo *stage,
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VkPipelineCreateFlags2KHR flags, const void *pNext)
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{
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struct radv_pipeline_key key;
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gl_shader_stage s = vk_to_mesa_shader_stage(stage->stage);
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struct radv_shader_stage_key key = {0};
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memset(&key, 0, sizeof(key));
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key.keep_statistic_info = radv_pipeline_capture_shader_stats(device, flags);
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if (flags & VK_PIPELINE_CREATE_2_DISABLE_OPTIMIZATION_BIT_KHR)
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key.optimisations_disabled = 1;
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if (stage->stage & RADV_GRAPHICS_STAGE_BITS) {
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key.version = device->instance->drirc.override_graphics_shader_version;
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} else if (stage->stage & RADV_RT_STAGE_BITS) {
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key.version = device->instance->drirc.override_ray_tracing_shader_version;
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} else {
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assert(stage->stage == VK_SHADER_STAGE_COMPUTE_BIT);
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key.version = device->instance->drirc.override_compute_shader_version;
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}
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const VkPipelineRobustnessCreateInfoEXT *pipeline_robust_info =
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vk_find_struct_const(pNext, PIPELINE_ROBUSTNESS_CREATE_INFO_EXT);
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const VkPipelineRobustnessCreateInfoEXT *stage_robust_info =
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vk_find_struct_const(stage->pNext, PIPELINE_ROBUSTNESS_CREATE_INFO_EXT);
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/* map any hit to intersection as these shaders get merged */
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if (s == MESA_SHADER_ANY_HIT)
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s = MESA_SHADER_INTERSECTION;
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enum radv_buffer_robustness storage_robustness = device->buffer_robustness;
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enum radv_buffer_robustness uniform_robustness = device->buffer_robustness;
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enum radv_buffer_robustness vertex_robustness = device->buffer_robustness;
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const VkPipelineRobustnessCreateInfoEXT *robust_info = stage_robust_info ? stage_robust_info : pipeline_robust_info;
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if (robust_info) {
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storage_robustness = radv_convert_buffer_robustness(device, robust_info->storageBuffers);
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uniform_robustness = radv_convert_buffer_robustness(device, robust_info->uniformBuffers);
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vertex_robustness = radv_convert_buffer_robustness(device, robust_info->vertexInputs);
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}
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if (storage_robustness >= RADV_BUFFER_ROBUSTNESS_2)
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key.storage_robustness2 = 1;
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if (uniform_robustness >= RADV_BUFFER_ROBUSTNESS_2)
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key.uniform_robustness2 = 1;
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if (s == MESA_SHADER_VERTEX && vertex_robustness >= RADV_BUFFER_ROBUSTNESS_1)
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key.vertex_robustness1 = 1u;
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const VkPipelineShaderStageRequiredSubgroupSizeCreateInfo *const subgroup_size =
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vk_find_struct_const(stage->pNext, PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO);
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if (subgroup_size) {
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if (subgroup_size->requiredSubgroupSize == 32)
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key.subgroup_required_size = RADV_REQUIRED_WAVE32;
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else if (subgroup_size->requiredSubgroupSize == 64)
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key.subgroup_required_size = RADV_REQUIRED_WAVE64;
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else
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unreachable("Unsupported required subgroup size.");
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}
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if (stage->flags & VK_PIPELINE_SHADER_STAGE_CREATE_REQUIRE_FULL_SUBGROUPS_BIT) {
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key.subgroup_require_full = 1;
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}
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return key;
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}
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struct radv_pipeline_key
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radv_generate_pipeline_key(const struct radv_device *device, const VkPipelineShaderStageCreateInfo *stages,
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const unsigned num_stages, VkPipelineCreateFlags2KHR flags, const void *pNext)
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{
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struct radv_pipeline_key key = {0};
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for (uint32_t i = 0; i < num_stages; i++) {
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gl_shader_stage s = vk_to_mesa_shader_stage(stages[i].stage);
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key.stage_info[s].keep_statistic_info = radv_pipeline_capture_shader_stats(device, flags);
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if (flags & VK_PIPELINE_CREATE_2_DISABLE_OPTIMIZATION_BIT_KHR)
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key.stage_info[s].optimisations_disabled = 1;
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if (stages[i].stage & RADV_GRAPHICS_STAGE_BITS) {
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key.stage_info[s].version = device->instance->drirc.override_graphics_shader_version;
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} else if (stages[i].stage & RADV_RT_STAGE_BITS) {
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key.stage_info[s].version = device->instance->drirc.override_ray_tracing_shader_version;
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} else {
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assert(stages[i].stage == VK_SHADER_STAGE_COMPUTE_BIT);
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key.stage_info[s].version = device->instance->drirc.override_compute_shader_version;
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}
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const VkPipelineRobustnessCreateInfoEXT *stage_robust_info =
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vk_find_struct_const(stages[i].pNext, PIPELINE_ROBUSTNESS_CREATE_INFO_EXT);
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/* map any hit to intersection as these shaders get merged */
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if (s == MESA_SHADER_ANY_HIT)
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s = MESA_SHADER_INTERSECTION;
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enum radv_buffer_robustness storage_robustness = device->buffer_robustness;
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enum radv_buffer_robustness uniform_robustness = device->buffer_robustness;
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enum radv_buffer_robustness vertex_robustness = device->buffer_robustness;
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const VkPipelineRobustnessCreateInfoEXT *robust_info =
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stage_robust_info ? stage_robust_info : pipeline_robust_info;
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if (robust_info) {
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storage_robustness = radv_convert_buffer_robustness(device, robust_info->storageBuffers);
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uniform_robustness = radv_convert_buffer_robustness(device, robust_info->uniformBuffers);
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vertex_robustness = radv_convert_buffer_robustness(device, robust_info->vertexInputs);
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}
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if (storage_robustness >= RADV_BUFFER_ROBUSTNESS_2)
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key.stage_info[s].storage_robustness2 = 1;
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if (uniform_robustness >= RADV_BUFFER_ROBUSTNESS_2)
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key.stage_info[s].uniform_robustness2 = 1;
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if (s == MESA_SHADER_VERTEX && vertex_robustness >= RADV_BUFFER_ROBUSTNESS_1)
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key.stage_info[s].vertex_robustness1 = 1u;
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const VkPipelineShaderStageRequiredSubgroupSizeCreateInfo *const subgroup_size =
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vk_find_struct_const(stages[i].pNext, PIPELINE_SHADER_STAGE_REQUIRED_SUBGROUP_SIZE_CREATE_INFO);
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if (subgroup_size) {
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if (subgroup_size->requiredSubgroupSize == 32)
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key.stage_info[s].subgroup_required_size = RADV_REQUIRED_WAVE32;
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else if (subgroup_size->requiredSubgroupSize == 64)
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key.stage_info[s].subgroup_required_size = RADV_REQUIRED_WAVE64;
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else
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unreachable("Unsupported required subgroup size.");
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}
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if (stages[i].flags & VK_PIPELINE_SHADER_STAGE_CREATE_REQUIRE_FULL_SUBGROUPS_BIT) {
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key.stage_info[s].subgroup_require_full = 1;
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}
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key.stage_info[s] = radv_pipeline_get_shader_key(device, &stages[i], flags, pNext);
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}
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return key;
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@@ -2324,6 +2324,10 @@ struct radv_pipeline_key radv_generate_pipeline_key(const struct radv_device *de
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const unsigned num_stages, VkPipelineCreateFlags2KHR flags,
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const void *pNext);
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struct radv_shader_stage_key radv_pipeline_get_shader_key(const struct radv_device *device,
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const VkPipelineShaderStageCreateInfo *stage,
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VkPipelineCreateFlags2KHR flags, const void *pNext);
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void radv_pipeline_init(struct radv_device *device, struct radv_pipeline *pipeline, enum radv_pipeline_type type);
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VkResult radv_graphics_pipeline_create(VkDevice device, VkPipelineCache cache,
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