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i965: Tell the unit states how many binding table entries we have.

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Before the series with 3c9dc2d31b to
dynamically assign our binding table indices, we didn't really track our
binding table count per shader, so we never filled in these fields.

Affects cairo-gl trace runtime by -2.47953% +/- 1.07281% (n=20)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt
2013-11-01 17:43:43 -07:00
parent 3f319eef76
commit ff337bc800
7 changed files with 22 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/mesa/drivers/dri/i965/brw_vs_state.c
+2 -1
View File
@@ -79,7 +79,8 @@ brw_upload_vs_unit(struct brw_context *brw)
*/
vs->thread1.single_program_flow = (brw->gen == 5);
vs->thread1.binding_table_entry_count = 0;
vs->thread1.binding_table_entry_count =
brw->vs.prog_data->base.base.binding_table.size_bytes / 4;
if (brw->vs.prog_data->base.total_scratch != 0) {
vs->thread2.scratch_space_base_pointer =
src/mesa/drivers/dri/i965/brw_wm_state.c
+2 -1
View File
@@ -120,7 +120,8 @@ brw_upload_wm_unit(struct brw_context *brw)
else
wm->thread1.floating_point_mode = BRW_FLOATING_POINT_IEEE_754;
wm->thread1.binding_table_entry_count = 0;
wm->thread1.binding_table_entry_count =
brw->wm.prog_data->base.binding_table.size_bytes / 4;
if (brw->wm.prog_data->total_scratch != 0) {
wm->thread2.scratch_space_base_pointer =
src/mesa/drivers/dri/i965/gen6_vs_state.c
+3 -1
View File
@@ -165,7 +165,9 @@ upload_vs_state(struct brw_context *brw)
OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2));
OUT_BATCH(stage_state->prog_offset);
OUT_BATCH(floating_point_mode |
((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT));
((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT) |
((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) <<
GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
if (brw->vs.prog_data->base.total_scratch) {
OUT_RELOC(stage_state->scratch_bo,
src/mesa/drivers/dri/i965/gen6_wm_state.c
+5
View File
@@ -146,6 +146,11 @@ upload_wm_state(struct brw_context *brw)
/* CACHE_NEW_SAMPLER */
dw2 |= (ALIGN(brw->wm.base.sampler_count, 4) / 4) <<
GEN6_WM_SAMPLER_COUNT_SHIFT;
/* CACHE_NEW_WM_PROG */
dw2 |= ((brw->wm.prog_data->base.binding_table.size_bytes / 4) <<
GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
dw4 |= (brw->wm.prog_data->first_curbe_grf <<
GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
dw4 |= (brw->wm.prog_data->first_curbe_grf_16 <<
src/mesa/drivers/dri/i965/gen7_gs_state.c
+3 -1
View File
@@ -85,7 +85,9 @@ upload_gs_state(struct brw_context *brw)
OUT_BATCH(_3DSTATE_GS << 16 | (7 - 2));
OUT_BATCH(stage_state->prog_offset);
OUT_BATCH(((ALIGN(stage_state->sampler_count, 4)/4) <<
GEN6_GS_SAMPLER_COUNT_SHIFT));
GEN6_GS_SAMPLER_COUNT_SHIFT) |
((brw->gs.prog_data->base.base.binding_table.size_bytes / 4) <<
GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
if (brw->gs.prog_data->base.total_scratch) {
OUT_RELOC(stage_state->scratch_bo,
src/mesa/drivers/dri/i965/gen7_vs_state.c
+3 -1
View File
@@ -100,7 +100,9 @@ upload_vs_state(struct brw_context *brw)
OUT_BATCH(stage_state->prog_offset);
OUT_BATCH(floating_point_mode |
((ALIGN(stage_state->sampler_count, 4)/4) <<
GEN6_VS_SAMPLER_COUNT_SHIFT));
GEN6_VS_SAMPLER_COUNT_SHIFT) |
((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) <<
GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
if (brw->vs.prog_data->base.total_scratch) {
OUT_RELOC(stage_state->scratch_bo,
src/mesa/drivers/dri/i965/gen7_wm_state.c
+4
View File
@@ -160,6 +160,10 @@ upload_ps_state(struct brw_context *brw)
dw2 |=
(ALIGN(brw->wm.base.sampler_count, 4) / 4) << GEN7_PS_SAMPLER_COUNT_SHIFT;
/* CACHE_NEW_WM_PROG */
dw2 |= ((brw->wm.prog_data->base.binding_table.size_bytes / 4) <<
GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT);
/* Use ALT floating point mode for ARB fragment programs, because they
* require 0^0 == 1. Even though _CurrentFragmentProgram is used for
* rendering, CurrentFragmentProgram is used for this check to