ir3/isa: add isaspec definition for shfl
Signed-off-by: Job Noorman <jnoorman@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31358>
This commit is contained in:
Job Noorman
@@ -287,6 +287,7 @@ typedef enum {
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OPC_GETSPID = _OPC(6, 36), /* SP ID */
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OPC_GETWID = _OPC(6, 37), /* wavefront ID */
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OPC_GETFIBERID = _OPC(6, 38), /* fiber ID */
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OPC_SHFL = _OPC(6, 39),
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/* Logical opcodes for things that differ in a6xx+ */
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OPC_STC = _OPC(6, 40),
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@@ -260,6 +260,14 @@ typedef enum {
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ALIAS_MEM = 4,
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} ir3_alias_scope;
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typedef enum {
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SHFL_XOR = 1,
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SHFL_UP = 2,
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SHFL_DOWN = 3,
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SHFL_RUP = 6,
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SHFL_RDOWN = 7,
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} ir3_shfl_mode;
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typedef enum ir3_instruction_flags {
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/* (sy) flag is set on first instruction, and after sample
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* instructions (probably just on RAW hazard).
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@@ -416,6 +424,7 @@ struct ir3_instruction {
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unsigned d : 3; /* for ldc, component offset */
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bool typed : 1;
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unsigned base : 3;
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ir3_shfl_mode shfl_mode : 3;
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} cat6;
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struct {
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unsigned w : 1; /* write */
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@@ -2956,6 +2965,7 @@ INSTR1(QUAD_SHUFFLE_DIAG)
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INSTR2NODST(LDC_K)
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INSTR2NODST(STC)
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INSTR2NODST(STSC)
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INSTR2(SHFL)
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#ifndef GPU
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#elif GPU >= 600
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INSTR4NODST(STIB);
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@@ -382,6 +382,7 @@ static int parse_reg(const char *str)
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"getfiberid" return TOKEN(T_OP_GETFIBERID);
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"stc" return TOKEN(T_OP_STC);
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"stsc" return TOKEN(T_OP_STSC);
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"shfl" return TOKEN(T_OP_SHFL);
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("b16"|"b32"){1} ir3_yylval.str = yytext; return T_INSTR_TYPE;
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@@ -447,6 +448,12 @@ static int parse_reg(const char *str)
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"mem" return T_MOD_MEM;
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"rt" return T_MOD_RT;
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"xor" return T_MOD_XOR;
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"up" return T_MOD_UP;
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"down" return T_MOD_DOWN;
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"rup" return T_MOD_RUP;
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"rdown" return T_MOD_RDOWN;
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"h" return 'h';
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"=" return '=';
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"(" return '(';
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@@ -645,6 +645,7 @@ static void print_token(FILE *file, int type, YYSTYPE value)
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%token <tok> T_OP_GETFIBERID
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%token <tok> T_OP_STC
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%token <tok> T_OP_STSC
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%token <tok> T_OP_SHFL
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/* category 7: */
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%token <tok> T_OP_BAR
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@@ -716,6 +717,12 @@ static void print_token(FILE *file, int type, YYSTYPE value)
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%token <tok> T_MOD_MEM
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%token <tok> T_MOD_RT
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%token <tok> T_MOD_XOR
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%token <tok> T_MOD_UP
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%token <tok> T_MOD_DOWN
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%token <tok> T_MOD_RUP
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%token <tok> T_MOD_RDOWN
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%type <num> integer offset uoffset
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%type <num> flut_immed
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%type <flt> float
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@@ -1332,6 +1339,20 @@ cat6_stc:
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T_OP_STC { new_instr(OPC_STC); } cat6_type 'c' '[' const_dst ']' ',' src_reg ',' cat6_immed
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| T_OP_STSC { new_instr(OPC_STSC); } cat6_type 'c' '[' const_dst ']' ',' immediate ',' cat6_immed
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cat6_shfl_mode: T_MOD_XOR { instr->cat6.shfl_mode = SHFL_XOR; }
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| T_MOD_UP { instr->cat6.shfl_mode = SHFL_UP; }
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| T_MOD_DOWN { instr->cat6.shfl_mode = SHFL_DOWN; }
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| T_MOD_RUP { instr->cat6.shfl_mode = SHFL_RUP; }
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| T_MOD_RDOWN { instr->cat6.shfl_mode = SHFL_RDOWN; }
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/* This is added to make it easy to experiment with the
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* unknown modes.
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*/
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| integer { instr->cat6.shfl_mode = $1; }
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cat6_shfl:
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T_OP_SHFL { new_instr(OPC_SHFL); } '.' cat6_shfl_mode cat6_type dst ',' src ',' cat6_reg_or_immed
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cat6_todo: T_OP_G2L { new_instr(OPC_G2L); }
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| T_OP_L2G { new_instr(OPC_L2G); }
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| T_OP_RESFMT { new_instr(OPC_RESFMT); }
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@@ -1347,6 +1368,7 @@ cat6_instr: cat6_load
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| cat6_bindless_ldc
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| cat6_bindless_ibo
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| cat6_stc
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| cat6_shfl
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| cat6_todo
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cat7_scope: '.' 'w' { instr->cat7.w = true; }
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@@ -437,6 +437,21 @@ static const struct test {
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/* dEQP-VK.subgroups.quad.graphics.subgroupquadbroadcast_int */
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INSTR_6XX(c0260001_00c98000, "getfiberid.u32 r0.y"),
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/* dEQP-VK.subgroups.shuffle.compute.subgroupshuffleup_bvec4_constant */
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INSTR_6XX(c6e4400d_05800002, "shfl.up.u16 hr3.y, hr0.y, 5"),
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/* dEQP-VK.subgroups.shuffle.compute.subgroupshuffleup_f16vec3 */
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INSTR_6XX(c6e44017_c0000018, "shfl.up.u16 hr5.w, hr3.x, r48.x"),
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/* dEQP-VK.subgroups.shuffle.compute.subgroupshuffleup_uvec3_constant */
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INSTR_6XX(c6e64006_05800000, "shfl.up.u32 r1.z, r0.x, 5"),
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/* dEQP-VK.subgroups.shuffle.compute.subgroupshuffleup_ivec3_dynamically_uniform */
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INSTR_6XX(c6e64007_05000004, "shfl.up.u32 r1.w, r0.z, r1.y"),
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/* dEQP-VK.subgroups.shuffle.graphics.subgroupshuffledown_i8vec3 */
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INSTR_6XX(c6e46011_c1000014, "shfl.down.u16 hr4.y, hr2.z, r48.y"),
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/* dEQP-VK.memory_model.write_after_read.ext.u32.coherent.fence_atomic.atomicwrite.subgroup.payload_local.image.guard_local.image.frag */
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INSTR_6XX(c6e62005_3f800008, "shfl.xor.u32 r1.y, r1.x, 63"),
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/* dEQP-VK.subgroups.shuffle.graphics.subgroupshuffle_bvec4 */
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INSTR_6XX(c6e4c012_c0000020, "shfl.rup.u16 hr4.z, hr4.x, r48.x"),
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/* Custom test since we've never seen the blob emit these. */
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INSTR_6XX(c0260004_00490000, "getspid.u32 r1.x"),
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INSTR_6XX(c0260005_00494000, "getwid.u32 r1.y"),
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@@ -1322,7 +1322,55 @@ SOFTWARE.
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<pattern low="52" high="53">11</pattern>
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</bitset>
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<enum name="#cat6-shfl-mode">
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<value val="1" display="xor"/>
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<value val="2" display="up"/>
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<value val="3" display="down"/>
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<value val="6" display="rup"/>
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<value val="7" display="rdown"/>
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</enum>
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<bitset name="shfl" extends="#instruction-cat6-a3xx">
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<doc>
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Subgroup shuffle/rotate operations.
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shfl.xor, shfl.up, shfl.down are like Vulkan subgroupShuffleXor,
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subgroupShuffleUp, subgroupShuffleDown except that the mask/delta
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has to be dynamically uniform.
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shfl.rdown is Vulkan subgroupRotate. shfl.rup is like subgroupRotate
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with a negative delta.
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NOTE: SRC2 is always a full register, regardless of TYPE. The blob
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disassembles it as a half register when TYPE is u16 though. We don't
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copy this mistake here.
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</doc>
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<gen min="600"/>
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<display>
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{SY}{JP}{NAME}.{MODE}.{TYPE} {TYPE_HALF}{DST}, {TYPE_HALF}{SRC1}, {SRC2}
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</display>
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<pattern low="0" high="0">0</pattern>
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<field low="1" high="8" name="SRC1" type="#reg-gpr"/>
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<pattern low="9" high="22">00000000000000</pattern>
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<field low="23" high="23" name="SRC2_IM" type="bool"/>
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<field low="24" high="31" name="SRC2" type="#cat6-src">
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<param name="SRC2_IM" as="SRC_IM"/>
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</field>
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<field low="32" high="39" name="DST" type="#reg-gpr"/>
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<pattern low="40" high="44">xxxxx</pattern>
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<field low="45" high="47" name="MODE" type="#cat6-shfl-mode"/>
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<pattern low="48" high="48">x</pattern>
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<pattern low="52" high="53">10</pattern>
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<pattern low="54" high="58">11011</pattern> <!-- OPC -->
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<encode>
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<map name="MODE">src->cat6.shfl_mode</map>
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<map name="SRC2_IM">!!(src->srcs[1]->flags & IR3_REG_IMMED)</map>
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</encode>
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</bitset>
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<expr name="#cat6-d">
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{D_MINUS_ONE} + 1
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