radeon/uvd: move alignment to winsys
Similar to GFX and DMA. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
@@ -104,12 +104,6 @@ static unsigned alloc_stream_handle()
|
||||
/* flush IB to the hardware */
|
||||
static void flush(struct ruvd_decoder *dec)
|
||||
{
|
||||
uint32_t *pm4 = dec->cs->buf;
|
||||
|
||||
// align IB
|
||||
while(dec->cs->cdw % 16)
|
||||
pm4[dec->cs->cdw++] = RUVD_PKT2();
|
||||
|
||||
dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, 0);
|
||||
}
|
||||
|
||||
|
||||
@@ -494,6 +494,12 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags, ui
|
||||
OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
|
||||
}
|
||||
break;
|
||||
case RING_UVD:
|
||||
while (rcs->cdw & 15)
|
||||
OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (rcs->cdw > RADEON_MAX_CMDBUF_DWORDS) {
|
||||
|
||||
Reference in New Issue
Block a user