freedreno: dummy-draw workaround for a320
Fixes gpu lockups in supertuxkart. Signed-off-by: Rob Clark <robclark@freedesktop.org>
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@@ -231,6 +231,7 @@ emit_cache_flush(struct fd_ringbuffer *ring)
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OUT_PKT3(ring, CP_EVENT_WRITE, 1);
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OUT_RING(ring, CACHE_FLUSH);
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/* probably only really needed on a320: */
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OUT_PKT3(ring, CP_DRAW_INDX, 3);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX,
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@@ -523,7 +524,7 @@ fd3_emit_restore(struct fd_context *ctx)
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OUT_RING(ring, A3XX_RB_MSAA_CONTROL_DISABLE |
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A3XX_RB_MSAA_CONTROL_SAMPLES(MSAA_ONE) |
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A3XX_RB_MSAA_CONTROL_SAMPLE_MASK(0xffff));
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OUT_RING(ring, 0x00000000); /* UNKNOWN_20C3 */
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OUT_RING(ring, 0x00000000); /* RB_ALPHA_REF */
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OUT_PKT0(ring, REG_A3XX_GRAS_CL_GB_CLIP_ADJ, 1);
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OUT_RING(ring, A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(0) |
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@@ -59,6 +59,21 @@ fd_draw(struct fd_context *ctx, enum pc_di_primtype primtype,
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*/
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emit_marker(ring, 7);
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if (ctx->screen->gpu_id == 320) {
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/* dummy-draw workaround: */
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OUT_PKT3(ring, CP_DRAW_INDX, 3);
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OUT_RING(ring, 0x00000000);
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OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX,
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INDEX_SIZE_IGN, IGNORE_VISIBILITY));
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OUT_RING(ring, 0); /* NumIndices */
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/* ugg, hard-code register offset to avoid pulling in the
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* a3xx register headers into something #included from a2xx
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*/
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OUT_PKT0(ring, 0x2206, 1); /* A3XX_HLSQ_CONST_VSPRESV_RANGE_REG */
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OUT_RING(ring, 0);
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}
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OUT_PKT3(ring, CP_DRAW_INDX, idx_bo ? 5 : 3);
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OUT_RING(ring, 0x00000000); /* viz query info. */
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OUT_RING(ring, DRAW(primtype, src_sel,
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