AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

iris: RT flush for memorybarrier with texture bit

Browse Source 
PIXEL_BUFFER_BARRIER_BIT turns into PIPE_BARRIER_TEXTURE and it ought
to trigger an RT flush, according to brw_memory_barrier
This commit is contained in:
Kenneth Graunke
2018-11-20 11:20:27 -08:00
parent 2c23721397
commit f9612e7682
1 changed files with 1 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/iris/iris_pipe_control.c
+1 -7
View File
@@ -184,17 +184,11 @@ iris_memory_barrier(struct pipe_context *ctx, unsigned flags)
PIPE_CONTROL_CONST_CACHE_INVALIDATE;
}
if (flags & PIPE_BARRIER_TEXTURE) {
bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
}
if (flags & PIPE_BARRIER_FRAMEBUFFER) {
if (flags & (PIPE_BARRIER_TEXTURE | PIPE_BARRIER_FRAMEBUFFER)) {
bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
PIPE_CONTROL_RENDER_TARGET_FLUSH;
}
// XXX: MAPPED_BUFFER, QUERY_BUFFER, STREAMOUT_BUFFER, GLOBAL_BUFFER?
// XXX: don't unconditionally emit flushes in both engines, we don't
// even know if we're even using e.g. the compute engine...