pan/lib: clean up tilebuffer size helpers

This way we report the *actual* tilebuffer sizes rather than reporting
twice the amount and then correcting for it later on. The distinction
really only matters on V4 and V6 GPUs, but let's get it correct.

This shouln't have any functional changes, it just makes it easier to
reason about what each GPU supports.

While we're at it, correct the typo in the comment about what gens
supports disabling pipelining. It's *not* supported on V6.

Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35755>
This commit is contained in:
Erik Faye-Lund
2025-08-21 13:40:21 +02:00
committed by Marge Bot
parent 6a83193771
commit f9248e81a5
8 changed files with 49 additions and 38 deletions

View File

@@ -87,8 +87,8 @@ panfrost_open_device(void *memctx, int fd, struct panfrost_device *dev)
dev->core_count =
pan_query_core_count(&dev->kmod.props, &dev->core_id_range);
dev->thread_tls_alloc = pan_query_thread_tls_alloc(&dev->kmod.props);
dev->optimal_tib_size = pan_query_optimal_tib_size(dev->model);
dev->optimal_z_tib_size = pan_query_optimal_z_tib_size(dev->model);
dev->optimal_tib_size = pan_query_optimal_tib_size(dev->arch, dev->model);
dev->optimal_z_tib_size = pan_query_optimal_z_tib_size(dev->arch, dev->model);
dev->compressed_formats = pan_query_compressed_formats(&dev->kmod.props);
dev->tiler_features = pan_query_tiler_features(&dev->kmod.props);
dev->has_afbc = pan_query_afbc(&dev->kmod.props);

View File

@@ -143,7 +143,7 @@ pipe_to_pan_bind_flags(uint32_t pipe_bind_flags)
static unsigned
get_max_msaa(struct panfrost_device *dev, enum pipe_format format)
{
unsigned max_tib_size = pan_get_max_tib_size(dev->arch, dev->model);
unsigned max_tib_size = pan_query_tib_size(dev->model);
unsigned max_cbuf_atts = pan_get_max_cbufs(dev->arch, max_tib_size);
unsigned format_size = util_format_get_blocksize(format);
@@ -661,7 +661,7 @@ panfrost_init_screen_caps(struct panfrost_screen *screen)
bool is_gl3 = dev->debug & PAN_DBG_GL3;
unsigned max_tib_size =
pan_get_max_tib_size(dev->arch, dev->model);
pan_query_tib_size(dev->model);
caps->npot_textures = true;
caps->mixed_color_depth_bits = true;

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@@ -87,10 +87,10 @@
/* Table of supported Mali GPUs */
/* clang-format off */
const struct pan_model pan_model_list[] = {
MIDGARD_MODEL(0x600, "T600", "T60x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192),
MIDGARD_MODEL(0x600, "T600", "T60x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096),
MODEL_QUIRKS( .max_4x_msaa = true )),
MIDGARD_MODEL(0x620, "T620", "T62x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
MIDGARD_MODEL(0x720, "T720", "T72x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192),
MIDGARD_MODEL(0x620, "T620", "T62x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096)),
MIDGARD_MODEL(0x720, "T720", "T72x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096),
MODEL_QUIRKS( .no_hierarchical_tiling = true, .max_4x_msaa = true )),
MIDGARD_MODEL(0x750, "T760", "T76x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
MIDGARD_MODEL(0x820, "T820", "T82x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192),
@@ -100,8 +100,8 @@ const struct pan_model pan_model_list[] = {
MIDGARD_MODEL(0x860, "T860", "T86x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
MIDGARD_MODEL(0x880, "T880", "T88x", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x6000, "G71", "TMIx", MODEL_ANISO(NONE), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x6201, "G72", "THEx", MODEL_ANISO(R0P3), MODEL_TB_SIZES(16384, 8192)),
BIFROST_MODEL(0x6000, "G71", "TMIx", MODEL_ANISO(NONE), MODEL_TB_SIZES( 4096, 4096)),
BIFROST_MODEL(0x6201, "G72", "THEx", MODEL_ANISO(R0P3), MODEL_TB_SIZES( 8192, 4096)),
BIFROST_MODEL(0x7000, "G51", "TSIx", MODEL_ANISO(R1P1), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x7003, "G31", "TDVx", MODEL_ANISO(ALL), MODEL_TB_SIZES( 8192, 8192)),
BIFROST_MODEL(0x7201, "G76", "TNOx", MODEL_ANISO(ALL), MODEL_TB_SIZES(16384, 8192)),
@@ -266,7 +266,7 @@ pan_query_afrc(const struct pan_kmod_dev_props *props)
* size for the particular variant. The CORE_FEATURES register might help.
*/
unsigned
pan_query_optimal_tib_size(const struct pan_model *model)
pan_query_tib_size(const struct pan_model *model)
{
/* Preconditions ensure the returned value is a multiple of 1 KiB, the
* granularity of the colour buffer allocation field.
@@ -274,11 +274,11 @@ pan_query_optimal_tib_size(const struct pan_model *model)
assert(model->tilebuffer.color_size >= 2048);
assert(util_is_power_of_two_nonzero(model->tilebuffer.color_size));
return model->tilebuffer.color_size / 2;
return model->tilebuffer.color_size;
}
unsigned
pan_query_optimal_z_tib_size(const struct pan_model *model)
pan_query_z_tib_size(const struct pan_model *model)
{
/* Preconditions ensure the returned value is a multiple of 1 KiB, the
* granularity of the colour buffer allocation field.
@@ -286,7 +286,7 @@ pan_query_optimal_z_tib_size(const struct pan_model *model)
assert(model->tilebuffer.z_size >= 1024);
assert(util_is_power_of_two_nonzero(model->tilebuffer.z_size));
return model->tilebuffer.z_size / 2;
return model->tilebuffer.z_size;
}
uint64_t

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@@ -120,9 +120,37 @@ bool pan_query_afbc(const struct pan_kmod_dev_props *props);
bool pan_query_afrc(const struct pan_kmod_dev_props *props);
unsigned pan_query_optimal_tib_size(const struct pan_model *model);
unsigned pan_query_tib_size(const struct pan_model *model);
unsigned pan_query_optimal_z_tib_size(const struct pan_model *model);
unsigned pan_query_z_tib_size(const struct pan_model *model);
static inline unsigned
pan_query_optimal_tib_size(unsigned arch, const struct pan_model *model)
{
unsigned tib_size = pan_query_tib_size(model);
/* On V5, as well as V7 and later, we can disable pipelining to gain some
* extra tib memory.
*/
if (arch > 4 && arch != 6)
return tib_size / 2;
return tib_size;
}
static inline unsigned
pan_query_optimal_z_tib_size(unsigned arch, const struct pan_model *model)
{
unsigned tib_size = pan_query_z_tib_size(model);
/* On V5, as well as V7 and later, we can disable pipelining to gain some
* extra tib memory.
*/
if (arch > 4 && arch != 6)
return tib_size / 2;
return tib_size;
}
uint64_t pan_clamp_to_usable_va_range(const struct pan_kmod_dev *dev,
uint64_t va);
@@ -174,23 +202,6 @@ pan_meta_tile_size(unsigned arch)
return 32;
}
/* Returns the maximum usable color tilebuffer-size. This is *usually* twice
* the optimal tilebuffer-size, but not always.
*/
static inline unsigned
pan_get_max_tib_size(unsigned arch, const struct pan_model *model)
{
unsigned tib_size = pan_query_optimal_tib_size(model);
/* On V5, as well as V6 and later, we can disable pipelining to gain some
* extra tib memory.
*/
if (arch > 4 && arch != 6)
return tib_size * 2;
return tib_size;
}
static inline uint32_t
pan_get_max_cbufs(unsigned arch, unsigned max_tib_size)
{

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@@ -2855,8 +2855,8 @@ panvk_per_arch(cmd_inherit_render_state)(
/* If a draw was performed, the inherited sample count should match our current sample count */
assert(fbinfo->nr_samples == 0 || inheritance_info->rasterizationSamples == fbinfo->nr_samples);
*fbinfo = (struct pan_fb_info){
.tile_buf_budget = pan_query_optimal_tib_size(phys_dev->model),
.z_tile_buf_budget = pan_query_optimal_z_tib_size(phys_dev->model),
.tile_buf_budget = pan_query_optimal_tib_size(PAN_ARCH, phys_dev->model),
.z_tile_buf_budget = pan_query_optimal_z_tib_size(PAN_ARCH, phys_dev->model),
.tile_size = fbinfo->tile_size,
.cbuf_allocation = fbinfo->cbuf_allocation,
.nr_samples = inheritance_info->rasterizationSamples,

View File

@@ -685,7 +685,7 @@ get_image_format_sample_counts(struct panvk_physical_device *physical_device,
VkFormat format)
{
unsigned arch = pan_arch(physical_device->kmod.props.gpu_id);
unsigned max_tib_size = pan_get_max_tib_size(arch, physical_device->model);
unsigned max_tib_size = pan_query_tib_size(physical_device->model);
unsigned max_cbuf_atts = pan_get_max_cbufs(arch, max_tib_size);
assert(!vk_format_is_compressed(format));

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@@ -294,8 +294,8 @@ panvk_per_arch(cmd_init_render_state)(struct panvk_cmd_buffer *cmdbuf,
pRenderingInfo->layerCount;
cmdbuf->state.gfx.render.view_mask = pRenderingInfo->viewMask;
*fbinfo = (struct pan_fb_info){
.tile_buf_budget = pan_query_optimal_tib_size(phys_dev->model),
.z_tile_buf_budget = pan_query_optimal_z_tib_size(phys_dev->model),
.tile_buf_budget = pan_query_optimal_tib_size(PAN_ARCH, phys_dev->model),
.z_tile_buf_budget = pan_query_optimal_z_tib_size(PAN_ARCH, phys_dev->model),
.nr_samples = 0,
.rt_count = pRenderingInfo->colorAttachmentCount,
};

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@@ -541,7 +541,7 @@ panvk_per_arch(get_physical_device_properties)(
const struct panvk_instance *instance,
const struct panvk_physical_device *device, struct vk_properties *properties)
{
unsigned max_tib_size = pan_get_max_tib_size(PAN_ARCH, device->model);
unsigned max_tib_size = pan_query_tib_size(device->model);
const unsigned max_cbuf_format = 16; /* R32G32B32A32 */
unsigned max_cbuf_atts = pan_get_max_cbufs(PAN_ARCH, max_tib_size);