radeonsi: fold info->indirect conditionals into the last one in draw_vbo
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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@@ -1102,21 +1102,22 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
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r600_resource(ib.buffer)->TC_L2_dirty = false;
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}
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if (info->indirect && r600_resource(info->indirect)->TC_L2_dirty) {
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sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
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r600_resource(info->indirect)->TC_L2_dirty = false;
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}
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if (info->indirect_params &&
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r600_resource(info->indirect_params)->TC_L2_dirty) {
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sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
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r600_resource(info->indirect_params)->TC_L2_dirty = false;
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}
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/* Add buffer sizes for memory checking in need_cs_space. */
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if (info->indirect)
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if (info->indirect) {
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/* Add the buffer size for memory checking in need_cs_space. */
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r600_context_add_resource_size(ctx, info->indirect);
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if (r600_resource(info->indirect)->TC_L2_dirty) {
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sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
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r600_resource(info->indirect)->TC_L2_dirty = false;
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}
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if (info->indirect_params &&
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r600_resource(info->indirect_params)->TC_L2_dirty) {
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sctx->b.flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
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r600_resource(info->indirect_params)->TC_L2_dirty = false;
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}
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}
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si_need_cs_space(sctx);
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/* Since we've called r600_context_add_resource_size for vertex buffers,
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