radeon/llvm: Add isMov() to AMDILInstrInfo

This enables the CFGStructurizer to work without the AMDIL::MOV*
instructions.

src/gallium/drivers/radeon/AMDILCFGStructurizer.cpp

@@ -2862,16 +2862,6 @@ struct CFGStructTraits<AMDILCFGStructurizer>
     return true;
   }
 
-  static bool isPhimove(MachineInstr *instr) {
-    switch (instr->getOpcode()) {
-      ExpandCaseToAllTypes(AMDIL::MOVE);
-      break;
-    default:
-      return false;
-    }
-    return true;
-  }
-
   static DebugLoc getLastDebugLocInBB(MachineBasicBlock *blk) {
     //get DebugLoc from the first MachineBasicBlock instruction with debug info
     DebugLoc DL;
@@ -2899,6 +2889,9 @@ struct CFGStructTraits<AMDILCFGStructurizer>
   // instruction.  Such move instruction "belong to" the loop backward-edge.
   //
   static MachineInstr *getLoopendBlockBranchInstr(MachineBasicBlock *blk) {
+    const AMDILInstrInfo * TII = static_cast<const AMDILInstrInfo *>(
+                                  blk->getParent()->getTarget().getInstrInfo());
+
     for (MachineBasicBlock::reverse_iterator iter = blk->rbegin(),
          iterEnd = blk->rend(); iter != iterEnd; ++iter) {
       // FIXME: Simplify
@@ -2906,7 +2899,7 @@ struct CFGStructTraits<AMDILCFGStructurizer>
       if (instr) {
         if (isCondBranch(instr) || isUncondBranch(instr)) {
           return instr;
-        } else if (!isPhimove(instr)) {
+        } else if (!TII->isMov(instr->getOpcode())) {
           break;
         }
       }

src/gallium/drivers/radeon/AMDILInstrInfo.h

@@ -152,6 +152,8 @@ public:
                                         int64_t Imm) const = 0;
 
   virtual unsigned getIEQOpcode() const = 0;
+
+  virtual bool isMov(unsigned Opcode) const = 0;
 };
 
 }

src/gallium/drivers/radeon/R600InstrInfo.cpp

@@ -116,3 +116,14 @@ unsigned R600InstrInfo::getIEQOpcode() const
 {
   return AMDIL::SETE_INT;
 }
+
+bool R600InstrInfo::isMov(unsigned Opcode) const
+{
+  switch(Opcode) {
+  default: return false;
+  case AMDIL::MOV:
+  case AMDIL::MOV_IMM_F32:
+  case AMDIL::MOV_IMM_I32:
+    return true;
+  }
+}

src/gallium/drivers/radeon/R600InstrInfo.h

@@ -51,6 +51,7 @@ namespace llvm {
                                         int64_t Imm) const;
 
   virtual unsigned getIEQOpcode() const;
+  virtual bool isMov(unsigned Opcode) const;
 };
 
 } // End llvm namespace

src/gallium/drivers/radeon/SIInstrInfo.cpp

@@ -115,3 +115,18 @@ MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg,
   return MI;
 
 }
+
+bool SIInstrInfo::isMov(unsigned Opcode) const
+{
+  switch(Opcode) {
+  default: return false;
+  case AMDIL::S_MOV_B32:
+  case AMDIL::S_MOV_B64:
+  case AMDIL::V_MOV_B32_e32:
+  case AMDIL::V_MOV_B32_e64:
+  case AMDIL::V_MOV_IMM_F32:
+  case AMDIL::V_MOV_IMM_I32:
+  case AMDIL::S_MOV_IMM_I32:
+    return true;
+  }
+}

src/gallium/drivers/radeon/SIInstrInfo.h

@@ -55,6 +55,7 @@ public:
                                         int64_t Imm) const;
 
   virtual unsigned getIEQOpcode() const { assert(!"Implement"); return 0;}
+  virtual bool isMov(unsigned Opcode) const;
 
   };