radeon/r200: fix fbo-clearmipmap + gen-teximage
sw clears were being used and not getting the correct offsets in the span code. also not emitting correct offsets for CB draws to texture levels. (I've no idea why I'm playing with r100). This is a candidate for 7.9 and 7.10
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@@ -587,7 +587,7 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
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if (rrb) {
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OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLOROFFSET, 0));
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OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
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OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
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OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0));
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OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);
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@@ -60,7 +60,7 @@ static void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb);
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static GLubyte *r200_depth_2byte(const struct radeon_renderbuffer * rrb,
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GLint x, GLint y)
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{
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GLubyte *ptr = rrb->bo->ptr;
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GLubyte *ptr = rrb->bo->ptr + rrb->draw_offset;
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GLint offset;
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if (rrb->has_surface) {
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offset = x * rrb->cpp + y * rrb->pitch;
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@@ -85,7 +85,7 @@ static GLubyte *r200_depth_2byte(const struct radeon_renderbuffer * rrb,
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static GLubyte *r200_depth_4byte(const struct radeon_renderbuffer * rrb,
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GLint x, GLint y)
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{
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GLubyte *ptr = rrb->bo->ptr;
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GLubyte *ptr = rrb->bo->ptr + rrb->draw_offset;
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GLint offset;
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if (rrb->has_surface) {
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offset = x * rrb->cpp + y * rrb->pitch;
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@@ -439,7 +439,7 @@ static GLubyte *r600_ptr_color(const struct radeon_renderbuffer * rrb,
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static GLubyte *radeon_ptr_4byte(const struct radeon_renderbuffer * rrb,
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GLint x, GLint y)
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{
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GLubyte *ptr = rrb->bo->ptr;
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GLubyte *ptr = rrb->bo->ptr + rrb->draw_offset;
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uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
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GLint offset;
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@@ -479,7 +479,7 @@ static GLubyte *radeon_ptr_4byte(const struct radeon_renderbuffer * rrb,
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static GLubyte *radeon_ptr_2byte_8x2(const struct radeon_renderbuffer * rrb,
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GLint x, GLint y)
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{
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GLubyte *ptr = rrb->bo->ptr;
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GLubyte *ptr = rrb->bo->ptr + rrb->draw_offset;
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uint32_t mask = RADEON_BO_FLAGS_MACRO_TILE | RADEON_BO_FLAGS_MICRO_TILE;
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GLint offset;
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@@ -488,7 +488,7 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
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if (rrb) {
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OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLOROFFSET, 0));
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OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
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OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
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OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0));
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OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);
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