agx: fuse iadd+large shift into imad
total instructions in shared programs: 2750352 -> 2750211 (<.01%) instructions in affected programs: 86944 -> 86803 (-0.16%) helped: 32 HURT: 18 Instructions are helped. total alu in shared programs: 2273810 -> 2273669 (<.01%) alu in affected programs: 76720 -> 76579 (-0.18%) helped: 32 HURT: 18 Alu are helped. total fscib in shared programs: 2272127 -> 2271986 (<.01%) fscib in affected programs: 76720 -> 76579 (-0.18%) helped: 32 HURT: 18 Fscib are helped. total bytes in shared programs: 21476424 -> 21475184 (<.01%) bytes in affected programs: 649884 -> 648644 (-0.19%) helped: 33 HURT: 18 Bytes are helped. total regs in shared programs: 865114 -> 865090 (<.01%) regs in affected programs: 525 -> 501 (-4.57%) helped: 3 HURT: 0 total uniforms in shared programs: 2120792 -> 2120848 (<.01%) uniforms in affected programs: 414 -> 470 (13.53%) helped: 0 HURT: 8 Uniforms are HURT. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32081>
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@@ -189,6 +189,12 @@ for s in range(1, 5):
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(('ishl', a, s), iaddshl(0, a, s)),
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]
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# If the above rules failed, we have a large constant shift on the IC unit.
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# Might as well fuse an add to form an imad, if we're on the IC anyway.
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fuse_imad += [
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(('iadd', a, ('ishl(is_used_once)', b, '#c')), imad(b, ('ishl', 1, c), a)),
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]
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# Discard lowering generates this pattern, clean it up
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ixor_bcsel = [
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(('ixor', ('bcsel', a, '#b', '#c'), '#d'),
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