r600g: if pixel shader is NULL, bind a dummy one
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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@@ -37,6 +37,7 @@
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#include "util/u_pack_color.h"
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#include "util/u_memory.h"
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#include "util/u_inlines.h"
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#include "util/u_simple_shaders.h"
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#include "util/u_upload_mgr.h"
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#include "vl/vl_decoder.h"
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#include "vl/vl_video_buffer.h"
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@@ -191,6 +192,9 @@ static void r600_destroy_context(struct pipe_context *context)
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{
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struct r600_context *rctx = (struct r600_context *)context;
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if (rctx->dummy_pixel_shader) {
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rctx->context.delete_fs_state(&rctx->context, rctx->dummy_pixel_shader);
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}
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if (rctx->custom_dsa_flush) {
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rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
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}
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@@ -313,6 +317,12 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
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if (rctx->chip_class == R600)
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r600_set_max_scissor(rctx);
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rctx->dummy_pixel_shader =
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util_make_fragment_cloneinput_shader(&rctx->context, 0,
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TGSI_SEMANTIC_GENERIC,
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TGSI_INTERPOLATE_CONSTANT);
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rctx->context.bind_fs_state(&rctx->context, rctx->dummy_pixel_shader);
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return &rctx->context;
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fail:
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@@ -350,6 +350,10 @@ struct r600_context {
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* These track the current scissor state. */
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bool scissor_enable;
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struct pipe_scissor_state scissor_state;
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/* With rasterizer discard, there doesn't have to be a pixel shader.
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* In that case, we bind this one: */
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void *dummy_pixel_shader;
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};
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static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)
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@@ -461,14 +461,18 @@ void r600_bind_ps_shader(struct pipe_context *ctx, void *state)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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rctx->ps_shader = (struct r600_pipe_shader *)state;
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if (state) {
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r600_inval_shader_cache(rctx);
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r600_context_pipe_state_set(rctx, &rctx->ps_shader->rstate);
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rctx->cb_color_control &= C_028808_MULTIWRITE_ENABLE;
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rctx->cb_color_control |= S_028808_MULTIWRITE_ENABLE(!!rctx->ps_shader->shader.fs_write_all);
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if (!state) {
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state = rctx->dummy_pixel_shader;
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}
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rctx->ps_shader = (struct r600_pipe_shader *)state;
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r600_inval_shader_cache(rctx);
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r600_context_pipe_state_set(rctx, &rctx->ps_shader->rstate);
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rctx->cb_color_control &= C_028808_MULTIWRITE_ENABLE;
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rctx->cb_color_control |= S_028808_MULTIWRITE_ENABLE(!!rctx->ps_shader->shader.fs_write_all);
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if (rctx->ps_shader && rctx->vs_shader) {
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r600_adjust_gprs(rctx);
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}
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@@ -808,11 +812,14 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
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if ((!info.count && (info.indexed || !info.count_from_stream_output)) ||
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(info.indexed && !rctx->vbuf_mgr->index_buffer.buffer) ||
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!r600_conv_pipe_prim(info.mode, &prim)) {
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assert(0);
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return;
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}
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if (!rctx->ps_shader || !rctx->vs_shader)
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if (!rctx->vs_shader) {
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assert(0);
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return;
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}
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r600_update_derived_state(rctx);
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