freedreno/ir3: fix legalize for vecN inputs

The wrmask is handled in regmask_get()/regmask_set(), but it wasn't
being propagated from SSA src to dst.  So for example, an SSBO read
value that is passed in as src2.y component to atomic op, wasn't
getting the (sy) flag set.  Causing lots of fail.

Signed-off-by: Rob Clark <robdclark@gmail.com>

src/freedreno/ir3/ir3.h

@@ -1076,6 +1076,7 @@ static inline struct ir3_register * __ssa_src(struct ir3_instruction *instr,
 		flags |= IR3_REG_HALF;
 	reg = ir3_reg_create(instr, 0, IR3_REG_SSA | flags);
 	reg->instr = src;
+	reg->wrmask = src->regs[0]->wrmask;
 	return reg;
 }
 

src/freedreno/ir3/ir3_context.c

@@ -340,6 +340,8 @@ ir3_create_collect(struct ir3_context *ctx, struct ir3_instruction *const *arr,
 		ir3_reg_create(collect, 0, IR3_REG_SSA | flags)->instr = elem;
 	}
 
+	collect->regs[0]->wrmask = MASK(arrsz);
+
 	return collect;
 }