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aco/optimizer: optimze cndmask(a, b, not(c)) to cndmask(b, a, c)

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Can happen with nir_op_bitz/b2f/b2i.

Foz-DB Navi48:
Totals from 3465 (4.20% of 82419) affected shaders:
Instrs: 7534077 -> 7527637 (-0.09%); split: -0.09%, +0.01%
CodeSize: 40017384 -> 39993008 (-0.06%); split: -0.07%, +0.01%
Latency: 38593071 -> 38582815 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 8519291 -> 8518620 (-0.01%); split: -0.01%, +0.00%
VClause: 151669 -> 151662 (-0.00%); split: -0.02%, +0.02%
SClause: 155781 -> 155772 (-0.01%); split: -0.01%, +0.01%
Copies: 628453 -> 628531 (+0.01%); split: -0.01%, +0.02%
Branches: 180429 -> 180430 (+0.00%)
PreSGPRs: 182855 -> 182801 (-0.03%)
VALU: 4315173 -> 4315241 (+0.00%); split: -0.00%, +0.00%
SALU: 992125 -> 986876 (-0.53%); split: -0.53%, +0.00%
VOPD: 15827 -> 15838 (+0.07%); split: +0.23%, -0.16%

Foz-DB Navi21:
Totals from 3341 (4.06% of 82387) affected shaders:
MaxWaves: 61924 -> 61950 (+0.04%)
Instrs: 6640276 -> 6635078 (-0.08%); split: -0.08%, +0.00%
CodeSize: 35932788 -> 35913760 (-0.05%); split: -0.06%, +0.00%
VGPRs: 205512 -> 205456 (-0.03%)
Latency: 40201463 -> 40194285 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 12379144 -> 12378028 (-0.01%); split: -0.01%, +0.00%
VClause: 151556 -> 151563 (+0.00%); split: -0.01%, +0.01%
SClause: 157470 -> 157472 (+0.00%); split: -0.00%, +0.01%
Copies: 645034 -> 644947 (-0.01%); split: -0.02%, +0.01%
Branches: 192070 -> 192071 (+0.00%)
PreSGPRs: 173368 -> 173311 (-0.03%)
VALU: 4554790 -> 4554782 (-0.00%); split: -0.00%, +0.00%
SALU: 881251 -> 876087 (-0.59%); split: -0.59%, +0.00%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38530>
This commit is contained in:
Georg Lehmann
2025-03-21 15:40:59 +01:00
committed by Marge Bot
parent 752f1fb4ae
commit f5eb3fe9cb
1 changed files with 7 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
src/amd/compiler/aco_optimizer.cpp
View File

@@ -3044,8 +3044,11 @@ backpropagate_input_modifiers(opt_ctx& ctx, alu_opt_info& info, const alu_opt_op
if (info.uses_insert())
return false;
assert(type.num_components != 0);
/* Resolve swizzles first. */
if (op_info.op.size() > 1) {
if (type.bit_size == 1 || op_info.op.size() > 1) {
/* no swizzle */
assert(type.num_components == 1);
} else {
bitarray8 swizzle = 0;
@@ -4563,6 +4566,9 @@ combine_instruction(opt_ctx& ctx, aco_ptr<Instruction>& instr)
add_opt(s_not_b32, s_ff0_i32_b32, 0x1, "0");
} else if (info.opcode == aco_opcode::s_ff1_i32_b64 && ctx.program->gfx_level < GFX11) {
add_opt(s_not_b64, s_ff0_i32_b64, 0x1, "0");
} else if (info.opcode == aco_opcode::v_cndmask_b32) {
add_opt(s_not_b64, v_cndmask_b32, 0x4, "102");
add_opt(s_not_b32, v_cndmask_b32, 0x4, "102");
}
if (match_and_apply_patterns(ctx, info, patterns)) {