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winsys/amdgpu: addrlib - add Polaris support (v2)

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v2: fix indentation as noted by Michel

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Sonny Jiang
2015-11-03 11:46:38 -05:00
committed by Alex Deucher
parent 511ce2925b
commit f5e24b19e8
3 changed files with 18 additions and 2 deletions
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src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp
+7 -1
View File
@@ -351,6 +351,8 @@ AddrChipFamily CIAddrLib::HwlConvertChipFamily(
m_settings.isIceland = ASICREV_IS_ICELAND_M(uChipRevision);
m_settings.isTonga = ASICREV_IS_TONGA_P(uChipRevision);
m_settings.isFiji = ASICREV_IS_FIJI_P(uChipRevision);
m_settings.isPolaris10 = ASICREV_IS_POLARIS10_P(uChipRevision);
m_settings.isPolaris11 = ASICREV_IS_POLARIS11_M(uChipRevision);
break;
case FAMILY_CZ:
m_settings.isCarrizo = 1;
@@ -403,7 +405,7 @@ BOOL_32 CIAddrLib::HwlInitGlobalParams(
// @todo: VI
// Move this to VI code path once created
if (m_settings.isTonga)
if (m_settings.isTonga || m_settings.isPolaris10)
{
m_pipes = 8;
}
@@ -415,6 +417,10 @@ BOOL_32 CIAddrLib::HwlInitGlobalParams(
{
m_pipes = 16;
}
else if (m_settings.isPolaris11)
{
m_pipes = 4;
}
if (valid)
{
src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h
+2
View File
@@ -60,6 +60,8 @@ struct CIChipSettings
UINT_32 isIceland : 1;
UINT_32 isTonga : 1;
UINT_32 isFiji : 1;
UINT_32 isPolaris10 : 1;
UINT_32 isPolaris11 : 1;
// VI fusion (Carrizo)
UINT_32 isCarrizo : 1;
};
src/gallium/winsys/amdgpu/drm/amdgpu_id.h
+9 -1
View File
@@ -138,6 +138,10 @@ enum {
VI_FIJI_P_A0 = 60,
VI_POLARIS10_P_A0 = 80,
VI_POLARIS11_M_A0 = 90,
VI_UNKNOWN = 0xFF
};
@@ -147,7 +151,11 @@ enum {
#define ASICREV_IS_TONGA_P(eChipRev) \
((eChipRev >= VI_TONGA_P_A0) && (eChipRev < VI_FIJI_P_A0))
#define ASICREV_IS_FIJI_P(eChipRev) \
(eChipRev >= VI_FIJI_P_A0)
((eChipRev >= VI_FIJI_P_A0) && (eChipRev < VI_POLARIS10_P_A0))
#define ASICREV_IS_POLARIS10_P(eChipRev)\
((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0))
#define ASICREV_IS_POLARIS11_M(eChipRev) \
(eChipRev >= VI_POLARIS11_M_A0)
/* CZ specific rev IDs */
enum {