pan/bi: Split writemasks for memory stores
Will avoid a regression in the following commit, and probably fixes some GLES3.1 stuff. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10020>
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@@ -609,6 +609,10 @@ bi_emit_load(bi_builder *b, nir_intrinsic_instr *instr, enum bi_seg seg)
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static void
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bi_emit_store(bi_builder *b, nir_intrinsic_instr *instr, enum bi_seg seg)
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{
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/* Require contiguous masks, gauranteed by nir_lower_wrmasks */
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assert(nir_intrinsic_write_mask(instr) ==
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BITFIELD_MASK(instr->num_components));
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bi_store(b, instr->num_components * nir_src_bit_size(instr->src[0]),
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bi_src_index(&instr->src[0]),
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bi_src_index(&instr->src[1]), bi_addr_high(&instr->src[1]),
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@@ -2773,6 +2777,26 @@ glsl_type_size(const struct glsl_type *type, bool bindless)
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return glsl_count_attribute_slots(type, false);
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}
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/* Split stores to memory. We don't split stores to vertex outputs, since
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* nir_lower_io_to_temporaries will ensure there's only a single write.
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*/
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static bool
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should_split_wrmask(const nir_instr *instr, UNUSED const void *data)
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{
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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switch (intr->intrinsic) {
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case nir_intrinsic_store_ssbo:
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case nir_intrinsic_store_shared:
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case nir_intrinsic_store_global:
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case nir_intrinsic_store_scratch:
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return true;
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default:
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return false;
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}
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}
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static void
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bi_optimize_nir(nir_shader *nir)
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{
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@@ -2805,6 +2829,7 @@ bi_optimize_nir(nir_shader *nir)
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NIR_PASS(progress, nir, nir_lower_var_copies);
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NIR_PASS(progress, nir, nir_lower_vars_to_ssa);
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NIR_PASS(progress, nir, nir_lower_wrmasks, should_split_wrmask, NULL);
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NIR_PASS(progress, nir, nir_copy_prop);
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NIR_PASS(progress, nir, nir_opt_remove_phis);
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