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aco: support nir_op_bfdot2_bfadd

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Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34768>
This commit is contained in:
Georg Lehmann
2025-04-30 15:01:25 +02:00
committed by Marge Bot
parent ba63263f32
commit f5a5905e37
3 changed files with 10 additions and 0 deletions
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src/amd/compiler/aco_instruction_selection.cpp
+8
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@@ -2435,6 +2435,14 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
emit_idot_instruction(ctx, instr, aco_opcode::v_dot2_u32_u16, dst, true);
break;
}
case nir_op_bfdot2_bfadd: {
Temp src0 = as_vgpr(ctx, get_alu_src(ctx, instr->src[0], 2));
Temp src1 = as_vgpr(ctx, get_alu_src(ctx, instr->src[1], 2));
Temp src2 = get_alu_src(ctx, instr->src[2], 1);
bld.vop3(aco_opcode::v_dot2_bf16_bf16, Definition(dst), src0, src1, src2);
break;
}
case nir_op_cube_amd: {
Temp in = get_alu_src(ctx, instr->src[0], 3);
Temp src[3] = {emit_extract_vector(ctx, in, 0, v1), emit_extract_vector(ctx, in, 1, v1),
src/amd/compiler/aco_instruction_selection_setup.cpp
+1
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@@ -438,6 +438,7 @@ init_context(isel_context* ctx, nir_shader* shader)
case nir_op_sdot_2x16_iadd:
case nir_op_udot_2x16_uadd_sat:
case nir_op_sdot_2x16_iadd_sat:
case nir_op_bfdot2_bfadd:
case nir_op_alignbyte_amd: type = RegType::vgpr; break;
case nir_op_fmul:
case nir_op_ffma:
src/amd/compiler/aco_optimizer.cpp
+1
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@@ -648,6 +648,7 @@ alu_can_accept_constant(const aco_ptr<Instruction>& instr, unsigned operand)
case aco_opcode::v_interp_p2_f16_f32_inreg:
case aco_opcode::v_interp_p10_rtz_f16_f32_inreg:
case aco_opcode::v_interp_p2_rtz_f16_f32_inreg:
case aco_opcode::v_dot2_bf16_bf16: /* TODO */
case aco_opcode::v_wmma_f32_16x16x16_f16:
case aco_opcode::v_wmma_f32_16x16x16_bf16:
case aco_opcode::v_wmma_f16_16x16x16_f16: