i965: Remove support for the BLT ring
We still support the blitter on gen4-5 but it's on the same ring as 3D. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@@ -776,18 +776,12 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
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* To avoid stalling, execobject.offset should match the current
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* address of that object within the active context.
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*/
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int flags = I915_EXEC_NO_RELOC;
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assert(devinfo->gen < 6 || batch->ring == RENDER_RING);
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int flags = I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
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if (devinfo->gen >= 6 && batch->ring == BLT_RING) {
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flags |= I915_EXEC_BLT;
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} else {
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flags |= I915_EXEC_RENDER;
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}
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if (batch->needs_sol_reset)
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flags |= I915_EXEC_GEN7_SOL_RESET;
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uint32_t hw_ctx = batch->ring == RENDER_RING ? brw->hw_ctx : 0;
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/* Set statebuffer relocations */
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const unsigned state_index = batch->state.bo->index;
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if (state_index < batch->exec_count &&
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@@ -817,7 +811,7 @@ submit_batch(struct brw_context *brw, int in_fence_fd, int *out_fence_fd)
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batch->validation_list[index] = tmp;
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}
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ret = execbuffer(dri_screen->fd, batch, hw_ctx,
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ret = execbuffer(dri_screen->fd, batch, brw->hw_ctx,
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4 * USED_BATCH(*batch),
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in_fence_fd, out_fence_fd, flags);
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