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radeonsi: flatten the switch for DPBB tunables

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Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
This commit is contained in:
Marek Olšák
2019-06-19 22:24:51 -04:00
parent ac4b1e2f0a
commit f46efacd01
1 changed files with 4 additions and 14 deletions
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src/gallium/drivers/radeonsi/si_state_binning.c
+4 -14
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@@ -402,20 +402,10 @@ void si_emit_dpbb_state(struct si_context *sctx)
unsigned persistent_states_per_bin; /* allowed range: [0, 31] */
unsigned fpovs_per_batch; /* allowed range: [0, 255], 0 = unlimited */
switch (sctx->family) {
case CHIP_VEGA10:
case CHIP_VEGA12:
case CHIP_VEGA20:
case CHIP_RAVEN:
case CHIP_RAVEN2:
/* Tuned for Raven. Vega might need different values. */
context_states_per_bin = 5;
persistent_states_per_bin = 31;
fpovs_per_batch = 63;
break;
default:
assert(0);
}
/* Tuned for Raven. Vega might need different values. */
context_states_per_bin = 5;
persistent_states_per_bin = 31;
fpovs_per_batch = 63;
/* Emit registers. */
struct uvec2 bin_size_extend = {};