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freedreno/a5xx: split out helper for pipeline stalls

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We need a similar thing for indirect draws.

Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark
2017-11-14 14:15:27 -05:00
parent d74029bddc
commit f383cf9d41
2 changed files with 13 additions and 6 deletions
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src/gallium/drivers/freedreno/a5xx/fd5_compute.c
+1 -6
View File
@@ -160,12 +160,7 @@ fd5_launch_grid(struct fd_context *ctx, const struct pipe_grid_info *info)
if (info->indirect) {
struct fd_resource *rsc = fd_resource(info->indirect);
OUT_PKT7(ring, CP_EVENT_WRITE, 4);
OUT_RING(ring, CACHE_FLUSH_TS);
OUT_RELOCW(ring, fd5_context(ctx)->blit_mem, 0, 0, 0); /* ADDR_LO/HI */
OUT_RING(ring, 0x00000000);
OUT_WFI5(ring);
fd5_emit_flush(ctx, ring);
OUT_PKT7(ring, CP_EXEC_CS_INDIRECT, 4);
OUT_RING(ring, 0x00000000);
src/gallium/drivers/freedreno/a5xx/fd5_context.h
+12
View File
@@ -93,4 +93,16 @@ fd5_context(struct fd_context *ctx)
struct pipe_context *
fd5_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
/* helper for places where we need to stall CP to wait for previous draws: */
static inline void
fd5_emit_flush(struct fd_context *ctx, struct fd_ringbuffer *ring)
{
OUT_PKT7(ring, CP_EVENT_WRITE, 4);
OUT_RING(ring, CACHE_FLUSH_TS);
OUT_RELOCW(ring, fd5_context(ctx)->blit_mem, 0, 0, 0); /* ADDR_LO/HI */
OUT_RING(ring, 0x00000000);
OUT_WFI5(ring);
}
#endif /* FD5_CONTEXT_H_ */