llvmpipe: Don't limit the number of tiles in the cache.
This commit is contained in:
@@ -66,11 +66,6 @@ llvmpipe_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba,
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util_pack_color(rgba, ps->format, &cv);
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lp_tile_cache_clear(llvmpipe->cbuf_cache[i], rgba, cv);
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#if !TILE_CLEAR_OPTIMIZATION
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/* non-cached surface */
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pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, cv);
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#endif
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}
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}
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@@ -44,60 +44,17 @@
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#include "lp_tile_cache.h"
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/**
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* Return the position in the cache for the tile that contains win pos (x,y).
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* We currently use a direct mapped cache so this is like a hack key.
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* At some point we should investige something more sophisticated, like
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* a LRU replacement policy.
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*/
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#define CACHE_POS(x, y) \
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(((x) + (y) * 5) % NUM_ENTRIES)
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/**
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* Is the tile at (x,y) in cleared state?
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*/
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static INLINE uint
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is_clear_flag_set(const uint *bitvec, union tile_address addr)
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{
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int pos, bit;
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pos = addr.bits.y * (MAX_WIDTH / TILE_SIZE) + addr.bits.x;
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assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
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bit = bitvec[pos / 32] & (1 << (pos & 31));
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return bit;
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}
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/**
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* Mark the tile at (x,y) as not cleared.
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*/
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static INLINE void
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clear_clear_flag(uint *bitvec, union tile_address addr)
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{
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int pos;
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pos = addr.bits.y * (MAX_WIDTH / TILE_SIZE) + addr.bits.x;
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assert(pos / 32 < (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32);
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bitvec[pos / 32] &= ~(1 << (pos & 31));
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}
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struct llvmpipe_tile_cache *
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lp_create_tile_cache( struct pipe_screen *screen )
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{
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struct llvmpipe_tile_cache *tc;
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uint pos;
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tc = align_malloc( sizeof(struct llvmpipe_tile_cache), 16 );
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if (tc) {
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memset(tc, 0, sizeof *tc);
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tc->screen = screen;
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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tc->entries[pos].addr.bits.invalid = 1;
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}
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tc->last_tile = &tc->entries[0]; /* any tile */
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}
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tc = CALLOC_STRUCT( llvmpipe_tile_cache );
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if(!tc)
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return NULL;
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tc->screen = screen;
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return tc;
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}
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@@ -106,17 +63,23 @@ void
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lp_destroy_tile_cache(struct llvmpipe_tile_cache *tc)
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{
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struct pipe_screen *screen;
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uint pos;
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unsigned x, y;
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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/*assert(tc->entries[pos].x < 0);*/
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for (y = 0; y < MAX_HEIGHT; y += TILE_SIZE) {
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for (x = 0; x < MAX_WIDTH; x += TILE_SIZE) {
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struct llvmpipe_cached_tile *tile = &tc->entries[y/TILE_SIZE][x/TILE_SIZE];
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if(tile->color)
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align_free(tile->color);
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}
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}
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if (tc->transfer) {
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screen = tc->transfer->texture->screen;
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screen->tex_transfer_destroy(tc->transfer);
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}
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align_free( tc );
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FREE( tc );
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}
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@@ -146,11 +109,23 @@ lp_tile_cache_set_surface(struct llvmpipe_tile_cache *tc,
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if (ps) {
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struct pipe_screen *screen = ps->texture->screen;
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unsigned x, y;
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tc->transfer = screen->get_tex_transfer(screen, ps->texture, ps->face,
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ps->level, ps->zslice,
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PIPE_TRANSFER_READ_WRITE,
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0, 0, ps->width, ps->height);
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for (y = 0; y < ps->height; y += TILE_SIZE) {
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for (x = 0; x < ps->width; x += TILE_SIZE) {
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struct llvmpipe_cached_tile *tile = &tc->entries[y/TILE_SIZE][x/TILE_SIZE];
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tile->status = LP_TILE_STATUS_UNDEFINED;
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if(!tile->color)
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tile->color = align_malloc( TILE_SIZE*TILE_SIZE*NUM_CHANNELS, 16 );
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}
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}
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}
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}
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@@ -206,24 +181,33 @@ clear_tile(struct llvmpipe_cached_tile *tile,
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/**
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* Actually clear the tiles which were flagged as being in a clear state.
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* Flush the tile cache: write all dirty tiles back to the transfer.
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* any tiles "flagged" as cleared will be "really" cleared.
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*/
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static void
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lp_tile_cache_flush_clear(struct llvmpipe_tile_cache *tc)
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void
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lp_flush_tile_cache(struct llvmpipe_tile_cache *tc)
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{
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struct pipe_transfer *pt = tc->transfer;
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struct pipe_screen *screen = pt->texture->screen;
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const uint w = tc->transfer->width;
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const uint h = tc->transfer->height;
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uint x, y;
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uint numCleared = 0;
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unsigned x, y;
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if(!pt)
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return;
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/* push the tile to all positions marked as clear */
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for (y = 0; y < h; y += TILE_SIZE) {
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for (x = 0; x < w; x += TILE_SIZE) {
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union tile_address addr = tile_address(x, y, 0, 0, 0);
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for (y = 0; y < pt->height; y += TILE_SIZE) {
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for (x = 0; x < pt->width; x += TILE_SIZE) {
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struct llvmpipe_cached_tile *tile = &tc->entries[y/TILE_SIZE][x/TILE_SIZE];
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if (is_clear_flag_set(tc->clear_flags, addr)) {
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switch(tile->status) {
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case LP_TILE_STATUS_UNDEFINED:
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break;
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case LP_TILE_STATUS_CLEAR: {
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/**
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* Actually clear the tiles which were flagged as being in a clear state.
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*/
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struct pipe_screen *screen = pt->texture->screen;
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unsigned tw = TILE_SIZE;
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unsigned th = TILE_SIZE;
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void *dst;
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@@ -240,51 +224,16 @@ lp_tile_cache_flush_clear(struct llvmpipe_tile_cache *tc)
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x, y, tw, th,
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tc->clear_val);
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/* do this? */
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clear_clear_flag(tc->clear_flags, addr);
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screen->transfer_unmap(screen, pt);
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break;
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}
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numCleared++;
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case LP_TILE_STATUS_DEFINED:
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lp_put_tile_rgba_soa(pt, x, y, tile->color);
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break;
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}
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}
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}
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#if 0
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debug_printf("num cleared: %u\n", numCleared);
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#endif
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}
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/**
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* Flush the tile cache: write all dirty tiles back to the transfer.
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* any tiles "flagged" as cleared will be "really" cleared.
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*/
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void
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lp_flush_tile_cache(struct llvmpipe_tile_cache *tc)
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{
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struct pipe_transfer *pt = tc->transfer;
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int inuse = 0, pos;
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if (pt) {
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/* caching a drawing transfer */
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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struct llvmpipe_cached_tile *tile = tc->entries + pos;
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if (!tile->addr.bits.invalid) {
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lp_put_tile_rgba_soa(pt,
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tile->addr.bits.x * TILE_SIZE,
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tile->addr.bits.y * TILE_SIZE,
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tile->color);
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tile->addr.bits.invalid = 1; /* mark as empty */
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inuse++;
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}
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}
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#if TILE_CLEAR_OPTIMIZATION
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lp_tile_cache_flush_clear(tc);
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#endif
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}
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#if 0
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debug_printf("flushed tiles in use: %d\n", inuse);
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#endif
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}
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@@ -293,68 +242,34 @@ lp_flush_tile_cache(struct llvmpipe_tile_cache *tc)
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* \param x, y position of tile, in pixels
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*/
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void *
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lp_find_cached_tile(struct llvmpipe_tile_cache *tc,
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union tile_address addr )
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lp_get_cached_tile(struct llvmpipe_tile_cache *tc,
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unsigned x, unsigned y )
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{
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struct llvmpipe_cached_tile *tile = &tc->entries[y/TILE_SIZE][x/TILE_SIZE];
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struct pipe_transfer *pt = tc->transfer;
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/* cache pos/entry: */
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const int pos = CACHE_POS(addr.bits.x,
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addr.bits.y);
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struct llvmpipe_cached_tile *tile = tc->entries + pos;
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switch(tile->status) {
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case LP_TILE_STATUS_CLEAR:
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/* don't get tile from framebuffer, just clear it */
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clear_tile(tile, tc->clear_color);
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tile->status = LP_TILE_STATUS_DEFINED;
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break;
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if (addr.value != tile->addr.value) {
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case LP_TILE_STATUS_UNDEFINED:
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/* get new tile data from transfer */
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lp_get_tile_rgba_soa(pt, x, y, tile->color);
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tile->status = LP_TILE_STATUS_DEFINED;
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break;
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if (tile->addr.bits.invalid == 0) {
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/* put dirty tile back in framebuffer */
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lp_put_tile_rgba_soa(pt,
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tile->addr.bits.x * TILE_SIZE,
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tile->addr.bits.y * TILE_SIZE,
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tile->color);
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}
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tile->addr = addr;
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if (is_clear_flag_set(tc->clear_flags, addr)) {
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/* don't get tile from framebuffer, just clear it */
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clear_tile(tile, tc->clear_color);
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clear_clear_flag(tc->clear_flags, addr);
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}
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else {
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/* get new tile data from transfer */
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lp_get_tile_rgba_soa(pt,
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tile->addr.bits.x * TILE_SIZE,
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tile->addr.bits.y * TILE_SIZE,
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tile->color);
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}
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case LP_TILE_STATUS_DEFINED:
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/* nothing to do */
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break;
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}
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tc->last_tile = tile;
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return tile->color;
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}
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/**
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* Given the texture face, level, zslice, x and y values, compute
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* the cache entry position/index where we'd hope to find the
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* cached texture tile.
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* This is basically a direct-map cache.
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* XXX There's probably lots of ways in which we can improve this.
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*/
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static INLINE uint
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tex_cache_pos( union tile_address addr )
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{
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uint entry = (addr.bits.x +
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addr.bits.y * 9 +
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addr.bits.z * 3 +
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addr.bits.face +
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addr.bits.level * 7);
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return entry % NUM_ENTRIES;
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}
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/**
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* When a whole surface is being cleared to a value we can avoid
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* fetching tiles above.
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@@ -364,24 +279,21 @@ void
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lp_tile_cache_clear(struct llvmpipe_tile_cache *tc, const float *rgba,
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uint clearValue)
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{
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unsigned chan;
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uint pos;
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struct pipe_transfer *pt = tc->transfer;
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const unsigned w = pt->width;
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const unsigned h = pt->height;
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unsigned x, y, chan;
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for(chan = 0; chan < 4; ++chan)
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tc->clear_color[chan] = float_to_ubyte(rgba[chan]);
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tc->clear_val = clearValue;
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#if TILE_CLEAR_OPTIMIZATION
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/* set flags to indicate all the tiles are cleared */
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memset(tc->clear_flags, 255, sizeof(tc->clear_flags));
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#else
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/* disable the optimization */
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memset(tc->clear_flags, 0, sizeof(tc->clear_flags));
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#endif
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for (pos = 0; pos < NUM_ENTRIES; pos++) {
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struct llvmpipe_cached_tile *tile = tc->entries + pos;
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tile->addr.bits.invalid = 1;
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/* push the tile to all positions marked as clear */
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for (y = 0; y < h; y += TILE_SIZE) {
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for (x = 0; x < w; x += TILE_SIZE) {
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struct llvmpipe_cached_tile *tile = &tc->entries[y/TILE_SIZE][x/TILE_SIZE];
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tile->status = LP_TILE_STATUS_CLEAR;
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}
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}
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}
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@@ -28,41 +28,26 @@
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#ifndef LP_TILE_CACHE_H
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#define LP_TILE_CACHE_H
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#define TILE_CLEAR_OPTIMIZATION 1
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#include "pipe/p_compiler.h"
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#include "lp_tile_soa.h"
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struct llvmpipe_context;
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struct llvmpipe_tile_cache;
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/* If we need to support > 4096, just expand this to be a 64 bit
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* union, or consider tiling in Z as well.
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*/
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union tile_address {
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struct {
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unsigned x:6; /* 4096 / TILE_SIZE */
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unsigned y:6; /* 4096 / TILE_SIZE */
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unsigned z:12; /* 4096 -- z not tiled */
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unsigned face:3;
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unsigned level:4;
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unsigned invalid:1;
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} bits;
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unsigned value;
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enum llvmpipe_tile_status
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{
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LP_TILE_STATUS_UNDEFINED = 0,
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LP_TILE_STATUS_CLEAR = 1,
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LP_TILE_STATUS_DEFINED = 2
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};
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struct llvmpipe_cached_tile
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{
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union tile_address addr;
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/** color in SOA format */
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uint8_t ALIGN16_ATTRIB color[TILE_SIZE*TILE_SIZE*NUM_CHANNELS];
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};
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enum llvmpipe_tile_status status;
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#define NUM_ENTRIES 50
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/** color in SOA format */
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uint8_t *color;
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};
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/** XXX move these */
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@@ -77,8 +62,8 @@ struct llvmpipe_tile_cache
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struct pipe_transfer *transfer;
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void *transfer_map;
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struct llvmpipe_cached_tile entries[NUM_ENTRIES];
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uint clear_flags[(MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) / 32];
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struct llvmpipe_cached_tile entries[MAX_WIDTH/TILE_SIZE][MAX_HEIGHT/TILE_SIZE];
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uint8_t clear_color[4]; /**< for color bufs */
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uint clear_val; /**< for z+stencil, or packed color clear value */
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@@ -113,43 +98,8 @@ lp_tile_cache_clear(struct llvmpipe_tile_cache *tc, const float *rgba,
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uint clearValue);
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extern void *
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lp_find_cached_tile(struct llvmpipe_tile_cache *tc,
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union tile_address addr );
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static INLINE const union tile_address
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tile_address( unsigned x,
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unsigned y,
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unsigned z,
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unsigned face,
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unsigned level )
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{
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union tile_address addr;
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addr.value = 0;
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addr.bits.x = x / TILE_SIZE;
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addr.bits.y = y / TILE_SIZE;
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addr.bits.z = z;
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addr.bits.face = face;
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addr.bits.level = level;
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return addr;
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}
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/* Quickly retrieve tile if it matches last lookup.
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*/
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static INLINE void *
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lp_get_cached_tile(struct llvmpipe_tile_cache *tc,
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int x, int y )
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{
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union tile_address addr = tile_address( x, y, 0, 0, 0 );
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if (tc->last_tile->addr.value == addr.value)
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return &tc->last_tile->color;
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return lp_find_cached_tile( tc, addr );
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}
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lp_get_cached_tile(struct llvmpipe_tile_cache *tc,
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unsigned x, unsigned y );
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#endif /* LP_TILE_CACHE_H */
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