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nvc0: properly align NVE4_COMPUTE_MP_TEMP_SIZE

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MP_TEMP_SIZE must be aligned to 0x8000, while TEMP_SIZE on NVE4_3D
must be aligned to 0x20000, so perform both alignments to be sure
we allocate enough space (actually the bo will most likely use 128
KiB pages and not aligning to that would be a waste anyway).

Cc: "9.2" mesa-stable@lists.freedesktop.org
This commit is contained in:
Samuel Pitoiset
2013-07-25 10:35:33 +02:00
committed by Christoph Bumiller
parent 5ffa28df4e
commit ef6d5ee9f3
2 changed files with 3 additions and 2 deletions
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src/gallium/drivers/nvc0/nvc0_screen.c
+1
View File
@@ -512,6 +512,7 @@ nvc0_screen_resize_tls_area(struct nvc0_screen *screen,
}
size *= (screen->base.device->chipset >= 0xe0) ? 64 : 48; /* max warps */
size = align(size, 0x8000);
size *= screen->mp_count;
size = align(size, 1 << 17);
src/gallium/drivers/nvc0/nve4_compute.c
+2 -2
View File
@@ -78,11 +78,11 @@ nve4_screen_compute_setup(struct nvc0_screen *screen,
*/
BEGIN_NVC0(push, NVE4_COMPUTE(MP_TEMP_SIZE_HIGH(0)), 3);
PUSH_DATAh(push, screen->tls->size / screen->mp_count);
PUSH_DATA (push, screen->tls->size / screen->mp_count);
PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff);
PUSH_DATA (push, 0xff);
BEGIN_NVC0(push, NVE4_COMPUTE(MP_TEMP_SIZE_HIGH(1)), 3);
PUSH_DATAh(push, screen->tls->size / screen->mp_count);
PUSH_DATA (push, screen->tls->size / screen->mp_count);
PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff);
PUSH_DATA (push, 0xff);
/* Unified address space ? Who needs that ? Certainly not OpenCL.