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r600g: move to per-miplevel array mode.

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Since the hw transitions from 2D->1D sampling below the 2D macrotile
size we need to keep track of the array mode per level so we can
render to it using the CB.
This commit is contained in:
Dave Airlie
2010-10-21 13:26:04 +10:00
parent 206fbd9640
commit ea5aab85fd
4 changed files with 23 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/r600/evergreen_state.c
+4 -3
View File
@@ -807,14 +807,15 @@ static void evergreen_db(struct r600_pipe_context *rctx, struct r600_pipe_state
if (state->zsbuf == NULL)
return;
level = state->zsbuf->level;
rtex = (struct r600_resource_texture*)state->zsbuf->texture;
rtex->tiled = 1;
rtex->array_mode = 2;
rtex->array_mode[level] = 2;
rtex->tile_type = 1;
rtex->depth = 1;
rbuffer = &rtex->resource;
level = state->zsbuf->level;
pitch = rtex->pitch_in_pixels[level] / 8 - 1;
slice = rtex->pitch_in_pixels[level] * state->zsbuf->height / 64 - 1;
format = r600_translate_dbformat(state->zsbuf->texture->format);
@@ -840,7 +841,7 @@ static void evergreen_db(struct r600_pipe_context *rctx, struct r600_pipe_state
S_028044_FORMAT(stencil_format), 0xFFFFFFFF, rbuffer->bo);
r600_pipe_state_add_reg(rstate, R_028040_DB_Z_INFO,
S_028040_ARRAY_MODE(rtex->array_mode) | S_028040_FORMAT(format),
S_028040_ARRAY_MODE(rtex->array_mode[level]) | S_028040_FORMAT(format),
0xFFFFFFFF, rbuffer->bo);
r600_pipe_state_add_reg(rstate, R_028058_DB_DEPTH_SIZE,
S_028058_PITCH_TILE_MAX(pitch),
src/gallium/drivers/r600/r600_resource.h
+1 -1
View File
@@ -53,10 +53,10 @@ struct r600_resource_texture {
unsigned pitch_in_bytes[PIPE_MAX_TEXTURE_LEVELS];
unsigned pitch_in_pixels[PIPE_MAX_TEXTURE_LEVELS];
unsigned layer_size[PIPE_MAX_TEXTURE_LEVELS];
unsigned array_mode[PIPE_MAX_TEXTURE_LEVELS];
unsigned pitch_override;
unsigned size;
unsigned tiled;
unsigned array_mode;
unsigned tile_type;
unsigned depth;
unsigned dirty;
src/gallium/drivers/r600/r600_state.c
+6 -5
View File
@@ -658,7 +658,7 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
}
pitch = align(tmp->pitch_in_pixels[0], 8);
if (tmp->tiled) {
array_mode = tmp->array_mode;
array_mode = tmp->array_mode[0];
tile_type = tmp->tile_type;
}
@@ -974,7 +974,7 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
swap = r600_translate_colorswap(rtex->resource.base.b.format);
color_info = S_0280A0_FORMAT(format) |
S_0280A0_COMP_SWAP(swap) |
S_0280A0_ARRAY_MODE(rtex->array_mode) |
S_0280A0_ARRAY_MODE(rtex->array_mode[level]) |
S_0280A0_BLEND_CLAMP(1) |
S_0280A0_NUMBER_TYPE(ntype);
if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
@@ -1016,14 +1016,15 @@ static void r600_db(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
if (state->zsbuf == NULL)
return;
level = state->zsbuf->level;
rtex = (struct r600_resource_texture*)state->zsbuf->texture;
rtex->tiled = 1;
rtex->array_mode = 2;
rtex->array_mode[level] = 2;
rtex->tile_type = 1;
rtex->depth = 1;
rbuffer = &rtex->resource;
level = state->zsbuf->level;
pitch = rtex->pitch_in_pixels[level] / 8 - 1;
slice = rtex->pitch_in_pixels[level] * state->zsbuf->height / 64 - 1;
format = r600_translate_dbformat(state->zsbuf->texture->format);
@@ -1035,7 +1036,7 @@ static void r600_db(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028004_DB_DEPTH_VIEW, 0x00000000, 0xFFFFFFFF, NULL);
r600_pipe_state_add_reg(rstate, R_028010_DB_DEPTH_INFO,
S_028010_ARRAY_MODE(rtex->array_mode) | S_028010_FORMAT(format),
S_028010_ARRAY_MODE(rtex->array_mode[level]) | S_028010_FORMAT(format),
0xFFFFFFFF, rbuffer->bo);
r600_pipe_state_add_reg(rstate, R_028D34_DB_PREFETCH_LIMIT,
(state->zsbuf->height / 8) - 1, 0xFFFFFFFF, NULL);
src/gallium/drivers/r600/r600_texture.c
+12 -3
View File
@@ -142,8 +142,16 @@ static unsigned pitch_to_width(enum pipe_format format,
util_format_get_blockwidth(format);
}
static void r600_texture_set_array_mode(struct pipe_screen *screen,
struct r600_resource_texture *rtex,
unsigned level, unsigned array_mode)
{
rtex->array_mode[level] = array_mode;
}
static void r600_setup_miptree(struct pipe_screen *screen,
struct r600_resource_texture *rtex)
struct r600_resource_texture *rtex,
unsigned array_mode)
{
struct pipe_resource *ptex = &rtex->resource.base.b;
struct radeon *radeon = (struct radeon *)screen->winsys;
@@ -152,6 +160,8 @@ static void r600_setup_miptree(struct pipe_screen *screen,
unsigned nblocksy;
for (i = 0, offset = 0; i <= ptex->last_level; i++) {
r600_texture_set_array_mode(screen, rtex, i, array_mode);
pitch = r600_texture_get_stride(screen, rtex, i);
nblocksy = r600_texture_get_nblocksy(screen, rtex, i);
@@ -198,11 +208,10 @@ r600_texture_create_object(struct pipe_screen *screen,
resource->bo = bo;
resource->domain = r600_domain_from_usage(resource->base.b.bind);
rtex->pitch_override = pitch_in_bytes_override;
rtex->array_mode = array_mode;
if (array_mode)
rtex->tiled = 1;
r600_setup_miptree(screen, rtex);
r600_setup_miptree(screen, rtex, array_mode);
resource->size = rtex->size;