i965: Move gen8_disable_stages to brw_upload_initial_gpu_state
3DSTATE_WM_CHROMAKEY isn't programmed anywhere else. 3DSTATE_WM_HZ_OP is programmed, then cleared by blorp during a HZ op, so repeatedly clearing it after every blorp execution is redundant. Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
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@@ -201,7 +201,6 @@ i965_FILES = \
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gen7_wm_surface_state.c \
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gen8_blend_state.c \
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gen8_depth_state.c \
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gen8_disable.c \
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gen8_draw_upload.c \
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gen8_ds_state.c \
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gen8_gs_state.c \
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@@ -149,7 +149,6 @@ extern const struct brw_tracked_state gen7_wm_state;
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extern const struct brw_tracked_state gen7_hw_binding_tables;
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extern const struct brw_tracked_state haswell_cut_index;
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extern const struct brw_tracked_state gen8_blend_state;
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extern const struct brw_tracked_state gen8_disable_stages;
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extern const struct brw_tracked_state gen8_ds_state;
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extern const struct brw_tracked_state gen8_gs_state;
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extern const struct brw_tracked_state gen8_hs_state;
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@@ -332,7 +332,6 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
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&brw_gs_samplers,
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&gen8_multisample_state,
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&gen8_disable_stages,
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&gen8_vs_state,
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&gen8_hs_state,
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&gen7_te_state,
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@@ -411,6 +410,19 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
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if (brw->gen >= 8) {
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gen8_emit_3dstate_sample_pattern(brw);
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BEGIN_BATCH(5);
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OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2));
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OUT_BATCH(0);
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OUT_BATCH(0);
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OUT_BATCH(0);
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OUT_BATCH(0);
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ADVANCE_BATCH();
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BEGIN_BATCH(2);
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OUT_BATCH(_3DSTATE_WM_CHROMAKEY << 16 | (2 - 2));
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OUT_BATCH(0);
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ADVANCE_BATCH();
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}
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}
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@@ -1,53 +0,0 @@
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/*
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* Copyright © 2011 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "brw_context.h"
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#include "brw_state.h"
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#include "brw_defines.h"
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#include "intel_batchbuffer.h"
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static void
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disable_stages(struct brw_context *brw)
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{
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BEGIN_BATCH(5);
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OUT_BATCH(_3DSTATE_WM_HZ_OP << 16 | (5 - 2));
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OUT_BATCH(0);
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OUT_BATCH(0);
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OUT_BATCH(0);
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OUT_BATCH(0);
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ADVANCE_BATCH();
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BEGIN_BATCH(2);
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OUT_BATCH(_3DSTATE_WM_CHROMAKEY << 16 | (2 - 2));
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OUT_BATCH(0);
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ADVANCE_BATCH();
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}
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const struct brw_tracked_state gen8_disable_stages = {
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.dirty = {
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.mesa = 0,
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.brw = BRW_NEW_BLORP |
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BRW_NEW_CONTEXT,
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},
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.emit = disable_stages,
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};
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