i965: Use GEN_GEN and GEN_IS_HASWELL in genX_state_upload.c code.
We were using brw->gen, brw->is_haswell, and devinfo->gen in a few places, when we could just use GEN_GEN and GEN_IS_HASWELL, which are evaluated at compile time. Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
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@@ -563,7 +563,7 @@ genX(emit_vertices)(struct brw_context *brw)
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* vertex element may poke over the end of the buffer by 2 bytes.
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*/
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const unsigned padding =
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(GEN_GEN <= 7 && !brw->is_baytrail && !brw->is_haswell) * 2;
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(GEN_GEN <= 7 && !GEN_IS_HASWELL && !brw->is_baytrail) * 2;
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const unsigned end = buffer->offset + buffer->size + padding;
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dw = genX(emit_vertex_buffer_state)(brw, dw, i, buffer->bo,
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buffer->offset,
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@@ -4191,7 +4191,7 @@ genX(upload_cs_state)(struct brw_context *brw)
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.BindingTablePointer = stage_state->bind_bo_offset,
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.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs,
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.NumberofThreadsinGPGPUThreadGroup = cs_prog_data->threads,
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.SharedLocalMemorySize = encode_slm_size(devinfo->gen,
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.SharedLocalMemorySize = encode_slm_size(GEN_GEN,
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prog_data->total_shared),
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.BarrierEnable = cs_prog_data->uses_barrier,
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#if GEN_GEN >= 8 || GEN_IS_HASWELL
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@@ -4682,9 +4682,9 @@ genX(upload_default_color)(struct brw_context *brw,
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color.ui[3] = float_as_int(1.0);
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int alignment = 32;
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if (brw->gen >= 8) {
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if (GEN_GEN >= 8) {
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alignment = 64;
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} else if (brw->is_haswell && (is_integer_format || is_stencil_sampling)) {
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} else if (GEN_IS_HASWELL && (is_integer_format || is_stencil_sampling)) {
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alignment = 512;
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}
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