isl: Set MOCS to uncached for Gfx12.0 blitter sources/destinations
We were accidentally leaving XY_BLOCK_COPY_BLT's Source and Destination
MOCS fields set to 0 (Error: Reserved for Non-Use) on Gfx12.0 systems.
This was causing assert fails in debug builds, since we try to ensure
that we don't do that. In theory, MOCS 0 is supposed to be equivalent
to MOCS 2 (all the caching), but...we probably ought to use MOCS 3
(uncached). Every Gfx12.5+ platform requires it, so although there
isn't a note about Gfx12.0 needing that, it's possible that it does.
We're currently only using the blitter for DRI PRIME blits on Gfx12.0,
anyway, and I think we're flushing all the caches regardless.
This bug was somewhat obscure to hit:
- You need a hybrid graphics system with Gfx12.0 and some other GPU
- You have to be using "reverse PRIME", i.e. rendering on the integrated
GPU and displaying on the discrete one. This is not the common case.
- You have to be using a debug build.
No observable performance delta in GfxBench5 Car Chase (an arbitrary
program) when rendering on Alderlake GT1 and displaying on an Arc A770.
Fixes: 194afe8416 ("anv/iris/blorp: use the right MOCS values for each engine")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28894>
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@@ -175,6 +175,8 @@ isl_device_setup_mocs(struct isl_device *dev)
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dev->mocs.external = 5 << 1;
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/* UC */
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dev->mocs.uncached = 1 << 1;
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dev->mocs.blitter_dst = 1 << 1;
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dev->mocs.blitter_src = 1 << 1;
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} else {
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/* TC=1/LLC Only, LeCC=1/UC, LRUM=0, L3CC=3/WB */
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dev->mocs.external = 61 << 1;
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@@ -185,6 +187,10 @@ isl_device_setup_mocs(struct isl_device *dev)
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/* L1 - HDC:L1 + L3 + LLC */
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dev->mocs.l1_hdc_l3_llc = 48 << 1;
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/* Uncached */
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dev->mocs.blitter_dst = 3 << 1;
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dev->mocs.blitter_src = 3 << 1;
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}
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/* Protected is just an additional flag. */
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dev->mocs.protected_mask = 1 << 0;
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