gallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)

State trackers will not use the new param directly, but will instead use
a helper in MakeCurrent that does the right thing.

v2: rework the interface

Reviewed-by: Brian Paul <brianp@vmware.com>

src/gallium/auxiliary/driver_ddebug/dd_context.c

@@ -759,6 +759,16 @@ dd_context_make_image_handle_resident(struct pipe_context *_pipe,
    pipe->make_image_handle_resident(pipe, handle, access, resident);
 }
 
+static void
+dd_context_set_context_param(struct pipe_context *_pipe,
+                             enum pipe_context_param param,
+                             unsigned value)
+{
+   struct pipe_context *pipe = dd_context(_pipe)->pipe;
+
+   pipe->set_context_param(pipe, param, value);
+}
+
 struct pipe_context *
 dd_context_create(struct dd_screen *dscreen, struct pipe_context *pipe)
 {
@@ -862,6 +872,7 @@ dd_context_create(struct dd_screen *dscreen, struct pipe_context *pipe)
    CTX_INIT(create_image_handle);
    CTX_INIT(delete_image_handle);
    CTX_INIT(make_image_handle_resident);
+   CTX_INIT(set_context_param);
 
    dd_init_draw_functions(dctx);
 

src/gallium/auxiliary/driver_noop/noop_pipe.c

@@ -312,6 +312,12 @@ static void noop_invalidate_resource(struct pipe_context *ctx,
 {
 }
 
+static void noop_set_context_param(struct pipe_context *ctx,
+                                   enum pipe_context_param param,
+                                   unsigned value)
+{
+}
+
 static struct pipe_context *noop_create_context(struct pipe_screen *screen,
                                                 void *priv, unsigned flags)
 {
@@ -351,6 +357,7 @@ static struct pipe_context *noop_create_context(struct pipe_screen *screen,
    ctx->buffer_subdata = noop_buffer_subdata;
    ctx->texture_subdata = noop_texture_subdata;
    ctx->invalidate_resource = noop_invalidate_resource;
+   ctx->set_context_param = noop_set_context_param;
    noop_init_state_functions(ctx);
 
    return ctx;

src/gallium/auxiliary/driver_trace/tr_context.c

@@ -1576,6 +1576,25 @@ trace_context_invalidate_resource(struct pipe_context *_context,
    context->invalidate_resource(context, resource);
 }
 
+static void
+trace_context_set_context_param(struct pipe_context *_context,
+                                enum pipe_context_param param,
+                                unsigned value)
+{
+   struct trace_context *tr_context = trace_context(_context);
+   struct pipe_context *context = tr_context->pipe;
+
+   trace_dump_call_begin("pipe_context", "set_context_param");
+
+   trace_dump_arg(ptr, context);
+   trace_dump_arg(uint, param);
+   trace_dump_arg(uint, value);
+
+   trace_dump_call_end();
+
+   context->set_context_param(context, param, value);
+}
+
 static void
 trace_context_render_condition(struct pipe_context *_context,
                                struct pipe_query *query,
@@ -1948,6 +1967,7 @@ trace_context_create(struct trace_screen *tr_scr,
    TR_CTX_INIT(buffer_subdata);
    TR_CTX_INIT(texture_subdata);
    TR_CTX_INIT(invalidate_resource);
+   TR_CTX_INIT(set_context_param);
 
 #undef TR_CTX_INIT
 

src/gallium/include/pipe/p_context.h

@@ -927,6 +927,13 @@ struct pipe_context {
     */
    void (*callback)(struct pipe_context *ctx, void (*fn)(void *), void *data,
                     bool asap);
+
+   /**
+    * Set a context parameter See enum pipe_context_param for more details.
+    */
+   void (*set_context_param)(struct pipe_context *ctx,
+                             enum pipe_context_param param,
+                             unsigned value);
 };
 
 

src/gallium/include/pipe/p_defines.h

@@ -952,6 +952,20 @@ enum pipe_compute_cap
    PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK,
 };
 
+/**
+ * Types of parameters for pipe_context::set_context_param.
+ */
+enum pipe_context_param
+{
+   /* A hint for the driver that it should pin its execution threads to
+    * a group of cores sharing a specific L3 cache if the CPU has multiple
+    * L3 caches. This is needed for good multithreading performance on
+    * AMD Zen CPUs. "value" is the L3 cache index. Drivers that don't have
+    * any internal threads or don't run on affected CPUs can ignore this.
+    */
+   PIPE_CONTEXT_PARAM_PIN_THREADS_TO_L3_CACHE,
+};
+
 /**
  * Composite query types
  */