r600: clean up not used fields detected by clang
../src/gallium/drivers/r600/sfn/sfn_shader_gs.h:54:9: warning: private field 'm_first_vertex_emitted' is not used [-Wunused-private-field]
54 | bool m_first_vertex_emitted{false};
| ^
...
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34153>
This commit is contained in:
@@ -23,7 +23,6 @@ using std::string;
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using std::vector;
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Instr::Instr():
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m_use_count(0),
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m_block_id(std::numeric_limits<int>::max()),
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m_index(std::numeric_limits<int>::max())
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{
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@@ -142,7 +142,6 @@ private:
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InstrList m_required_instr;
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InstrList m_dependend_instr;
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int m_use_count;
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int m_block_id;
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int m_index;
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std::bitset<nflags> m_instr_flags{0};
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@@ -210,7 +210,6 @@ private:
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int m_lds_addr_count{0};
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int m_alu_groups_scheduled{0};
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r600_chip_class m_chip_class;
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radeon_family m_chip_family;
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bool m_idx0_loading{false};
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bool m_idx1_loading{false};
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bool m_idx0_pending{false};
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@@ -265,8 +264,7 @@ BlockScheduler::BlockScheduler(r600_chip_class chip_class,
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m_last_pixel(nullptr),
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m_last_param(nullptr),
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m_current_block(nullptr),
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m_chip_class(chip_class),
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m_chip_family(chip_family)
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m_chip_class(chip_class)
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{
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m_nop_after_rel_dest = chip_family == CHIP_RV770;
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@@ -51,13 +51,9 @@ private:
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unsigned m_ring_item_sizes[4]{0};
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bool m_tri_strip_adj_fix{false};
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bool m_first_vertex_emitted{false};
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int m_offset{0};
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int m_next_input_ring_offset{0};
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int m_cc_dist_mask{0};
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int m_clip_dist_write{0};
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int m_cur_ring_output{0};
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bool m_gs_tri_strip_adj_fix{false};
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uint64_t m_input_mask{0};
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unsigned m_noutputs{0};
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bool m_out_viewport{false};
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@@ -138,8 +138,7 @@ TESShader::TESShader(const pipe_stream_output_info *so_info,
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const r600_shader *gs_shader,
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const r600_shader_key& key):
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VertexStageShader("TES", key.tes.first_atomic_counter),
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m_vs_as_gs_a(key.vs.as_gs_a),
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m_tes_as_es(key.tes.as_es)
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m_vs_as_gs_a(key.vs.as_gs_a)
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{
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if (key.tes.as_es)
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m_export_processor = new VertexExportForGS(this, gs_shader);
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@@ -78,9 +78,7 @@ private:
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VertexExportStage *m_export_processor{nullptr};
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int m_tcs_vertices_out{0};
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bool m_vs_as_gs_a{false};
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bool m_tes_as_es{false};
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};
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} // namespace r600
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@@ -83,7 +83,6 @@ private:
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ExportInstr *m_last_pos_export{nullptr};
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int m_num_clip_dist{0};
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int m_next_param{0};
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uint8_t m_cc_dist_mask{0};
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uint8_t m_clip_dist_write{0};
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int m_cur_clip_pos{1};
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@@ -61,7 +61,6 @@ private:
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std::list<Instr *> m_last_ar_use;
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AluInstr *m_last_ar_load{nullptr};
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unsigned m_linear_index{0};
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unsigned m_last_idx_load_index[2] {0,0};
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AluInstr *m_last_idx_load[2] {nullptr, nullptr};
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std::list<Instr *> m_last_idx_use[2];
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@@ -282,7 +282,6 @@ private:
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PVirtualValue ssa_src(const nir_def& dest, int chan);
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int m_next_register_index;
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int m_next_temp_channel{0};
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template <typename Key, typename T>
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using unordered_map_alloc = std::unordered_map<Key,
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@@ -510,13 +510,11 @@ operator==(const RegisterVec4& lhs, const RegisterVec4& rhs)
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}
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RegisterVec4::Element::Element(const RegisterVec4& parent, int chan):
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m_parent(parent),
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m_value(new Register(parent.m_sel, chan, pin_none))
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{
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}
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RegisterVec4::Element::Element(const RegisterVec4& parent, PRegister value):
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m_parent(parent),
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m_value(value)
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{
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}
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@@ -287,7 +287,6 @@ public:
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void set_value(PRegister reg) { m_value = reg; }
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private:
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const RegisterVec4& m_parent;
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PRegister m_value;
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};
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