r600: clean up not used fields detected by clang

../src/gallium/drivers/r600/sfn/sfn_shader_gs.h:54:9: warning: private field 'm_first_vertex_emitted' is not used [-Wunused-private-field]
   54 |    bool m_first_vertex_emitted{false};
      |         ^
...

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34153>
This commit is contained in:
Patrick Lerda
2025-03-21 14:32:25 +01:00
committed by Marge Bot
parent bd88a92dde
commit e4a60c216a
11 changed files with 2 additions and 19 deletions
@@ -23,7 +23,6 @@ using std::string;
using std::vector;
Instr::Instr():
m_use_count(0),
m_block_id(std::numeric_limits<int>::max()),
m_index(std::numeric_limits<int>::max())
{
-1
View File
@@ -142,7 +142,6 @@ private:
InstrList m_required_instr;
InstrList m_dependend_instr;
int m_use_count;
int m_block_id;
int m_index;
std::bitset<nflags> m_instr_flags{0};
@@ -210,7 +210,6 @@ private:
int m_lds_addr_count{0};
int m_alu_groups_scheduled{0};
r600_chip_class m_chip_class;
radeon_family m_chip_family;
bool m_idx0_loading{false};
bool m_idx1_loading{false};
bool m_idx0_pending{false};
@@ -265,8 +264,7 @@ BlockScheduler::BlockScheduler(r600_chip_class chip_class,
m_last_pixel(nullptr),
m_last_param(nullptr),
m_current_block(nullptr),
m_chip_class(chip_class),
m_chip_family(chip_family)
m_chip_class(chip_class)
{
m_nop_after_rel_dest = chip_family == CHIP_RV770;
@@ -51,13 +51,9 @@ private:
unsigned m_ring_item_sizes[4]{0};
bool m_tri_strip_adj_fix{false};
bool m_first_vertex_emitted{false};
int m_offset{0};
int m_next_input_ring_offset{0};
int m_cc_dist_mask{0};
int m_clip_dist_write{0};
int m_cur_ring_output{0};
bool m_gs_tri_strip_adj_fix{false};
uint64_t m_input_mask{0};
unsigned m_noutputs{0};
bool m_out_viewport{false};
@@ -138,8 +138,7 @@ TESShader::TESShader(const pipe_stream_output_info *so_info,
const r600_shader *gs_shader,
const r600_shader_key& key):
VertexStageShader("TES", key.tes.first_atomic_counter),
m_vs_as_gs_a(key.vs.as_gs_a),
m_tes_as_es(key.tes.as_es)
m_vs_as_gs_a(key.vs.as_gs_a)
{
if (key.tes.as_es)
m_export_processor = new VertexExportForGS(this, gs_shader);
@@ -78,9 +78,7 @@ private:
VertexExportStage *m_export_processor{nullptr};
int m_tcs_vertices_out{0};
bool m_vs_as_gs_a{false};
bool m_tes_as_es{false};
};
} // namespace r600
@@ -83,7 +83,6 @@ private:
ExportInstr *m_last_pos_export{nullptr};
int m_num_clip_dist{0};
int m_next_param{0};
uint8_t m_cc_dist_mask{0};
uint8_t m_clip_dist_write{0};
int m_cur_clip_pos{1};
@@ -61,7 +61,6 @@ private:
std::list<Instr *> m_last_ar_use;
AluInstr *m_last_ar_load{nullptr};
unsigned m_linear_index{0};
unsigned m_last_idx_load_index[2] {0,0};
AluInstr *m_last_idx_load[2] {nullptr, nullptr};
std::list<Instr *> m_last_idx_use[2];
@@ -282,7 +282,6 @@ private:
PVirtualValue ssa_src(const nir_def& dest, int chan);
int m_next_register_index;
int m_next_temp_channel{0};
template <typename Key, typename T>
using unordered_map_alloc = std::unordered_map<Key,
@@ -510,13 +510,11 @@ operator==(const RegisterVec4& lhs, const RegisterVec4& rhs)
}
RegisterVec4::Element::Element(const RegisterVec4& parent, int chan):
m_parent(parent),
m_value(new Register(parent.m_sel, chan, pin_none))
{
}
RegisterVec4::Element::Element(const RegisterVec4& parent, PRegister value):
m_parent(parent),
m_value(value)
{
}
@@ -287,7 +287,6 @@ public:
void set_value(PRegister reg) { m_value = reg; }
private:
const RegisterVec4& m_parent;
PRegister m_value;
};