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freedreno/a3xx: fix rasterizer discard

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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5080>
This commit is contained in:
Ilia Mirkin
2020-05-17 19:50:08 -04:00
committed by Marge Bot
parent 5e10506834
commit e422f61e6e
2 changed files with 3 additions and 43 deletions
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.gitlab-ci/deqp-freedreno-a307-fails.txt
-42
View File
@@ -193,48 +193,6 @@ dEQP-GLES3.functional.rasterization.fbo.texture_2d.interpolation.triangles
dEQP-GLES3.functional.rasterization.fbo.texture_2d.primitives.points
dEQP-GLES3.functional.rasterization.flatshading.lines_wide
dEQP-GLES3.functional.rasterization.flatshading.triangles
dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_line_loop
dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_lines
dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_line_strip
dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_points
dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_triangle_fan
dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_triangles
dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_triangle_strip
dEQP-GLES3.functional.rasterizer_discard.basic.write_stencil_line_loop
dEQP-GLES3.functional.rasterizer_discard.basic.write_stencil_lines
dEQP-GLES3.functional.rasterizer_discard.basic.write_stencil_line_strip
dEQP-GLES3.functional.rasterizer_discard.basic.write_stencil_points
dEQP-GLES3.functional.rasterizer_discard.basic.write_stencil_triangle_fan
dEQP-GLES3.functional.rasterizer_discard.basic.write_stencil_triangles
dEQP-GLES3.functional.rasterizer_discard.basic.write_stencil_triangle_strip
dEQP-GLES3.functional.rasterizer_discard.fbo.write_depth_line_loop
dEQP-GLES3.functional.rasterizer_discard.fbo.write_depth_lines
dEQP-GLES3.functional.rasterizer_discard.fbo.write_depth_line_strip
dEQP-GLES3.functional.rasterizer_discard.fbo.write_depth_points
dEQP-GLES3.functional.rasterizer_discard.fbo.write_depth_triangle_fan
dEQP-GLES3.functional.rasterizer_discard.fbo.write_depth_triangles
dEQP-GLES3.functional.rasterizer_discard.fbo.write_depth_triangle_strip
dEQP-GLES3.functional.rasterizer_discard.fbo.write_stencil_line_loop
dEQP-GLES3.functional.rasterizer_discard.fbo.write_stencil_lines
dEQP-GLES3.functional.rasterizer_discard.fbo.write_stencil_line_strip
dEQP-GLES3.functional.rasterizer_discard.fbo.write_stencil_points
dEQP-GLES3.functional.rasterizer_discard.fbo.write_stencil_triangle_fan
dEQP-GLES3.functional.rasterizer_discard.fbo.write_stencil_triangles
dEQP-GLES3.functional.rasterizer_discard.fbo.write_stencil_triangle_strip
dEQP-GLES3.functional.rasterizer_discard.scissor.write_depth_line_loop
dEQP-GLES3.functional.rasterizer_discard.scissor.write_depth_lines
dEQP-GLES3.functional.rasterizer_discard.scissor.write_depth_line_strip
dEQP-GLES3.functional.rasterizer_discard.scissor.write_depth_points
dEQP-GLES3.functional.rasterizer_discard.scissor.write_depth_triangle_fan
dEQP-GLES3.functional.rasterizer_discard.scissor.write_depth_triangles
dEQP-GLES3.functional.rasterizer_discard.scissor.write_depth_triangle_strip
dEQP-GLES3.functional.rasterizer_discard.scissor.write_stencil_line_loop
dEQP-GLES3.functional.rasterizer_discard.scissor.write_stencil_lines
dEQP-GLES3.functional.rasterizer_discard.scissor.write_stencil_line_strip
dEQP-GLES3.functional.rasterizer_discard.scissor.write_stencil_points
dEQP-GLES3.functional.rasterizer_discard.scissor.write_stencil_triangle_fan
dEQP-GLES3.functional.rasterizer_discard.scissor.write_stencil_triangles
dEQP-GLES3.functional.rasterizer_discard.scissor.write_stencil_triangle_strip
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.float_highp
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.float_mediump
dEQP-GLES3.functional.shaders.derivate.dfdx.fastest.fbo_msaa4.vec2_highp
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
+3 -1
View File
@@ -531,7 +531,7 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
A3XX_RB_MSAA_CONTROL_SAMPLE_MASK(ctx->sample_mask));
}
if ((dirty & (FD_DIRTY_ZSA | FD_DIRTY_PROG | FD_DIRTY_BLEND_DUAL)) &&
if ((dirty & (FD_DIRTY_ZSA | FD_DIRTY_RASTERIZER | FD_DIRTY_PROG | FD_DIRTY_BLEND_DUAL)) &&
!emit->binning_pass) {
uint32_t val = fd3_zsa_stateobj(ctx->zsa)->rb_render_control |
fd3_blend_stateobj(ctx->blend)->rb_render_control;
@@ -539,6 +539,8 @@ fd3_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
val |= COND(fp->frag_face, A3XX_RB_RENDER_CONTROL_FACENESS);
val |= COND(fp->fragcoord_compmask != 0,
A3XX_RB_RENDER_CONTROL_COORD_MASK(fp->fragcoord_compmask));
val |= COND(ctx->rasterizer->rasterizer_discard,
A3XX_RB_RENDER_CONTROL_DISABLE_COLOR_PIPE);
/* I suppose if we needed to (which I don't *think* we need
* to), we could emit this for binning pass too. But we