intel/sanitize_gpu: deal with non page multiple buffer sizes
We can only map at page aligned offsets. We got that wrong with buffer size where (size % 4096) != 0 (anv has a WA buffer of 1024). Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
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@@ -39,6 +39,7 @@
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#include <i915_drm.h>
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#include "util/hash_table.h"
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#include "util/u_math.h"
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#define INTEL_LOG_TAG "INTEL-SANITIZE-GPU"
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#include "common/intel_log.h"
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@@ -165,7 +166,7 @@ padding_is_good(int fd, uint32_t handle)
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{
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struct drm_i915_gem_mmap mmap_arg = {
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.handle = handle,
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.offset = bo_size(fd, handle),
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.offset = align64(bo_size(fd, handle), 4096),
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.size = PADDING_SIZE,
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.flags = 0,
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};
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@@ -207,9 +208,11 @@ padding_is_good(int fd, uint32_t handle)
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static int
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create_with_padding(int fd, struct drm_i915_gem_create *create)
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{
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create->size += PADDING_SIZE;
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uint64_t original_size = create->size;
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create->size = align64(original_size, 4096) + PADDING_SIZE;
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int ret = libc_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, create);
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create->size -= PADDING_SIZE;
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create->size = original_size;
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if (ret != 0)
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return ret;
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@@ -217,7 +220,7 @@ create_with_padding(int fd, struct drm_i915_gem_create *create)
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uint8_t *noise_values;
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struct drm_i915_gem_mmap mmap_arg = {
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.handle = create->handle,
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.offset = create->size,
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.offset = align64(create->size, 4096),
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.size = PADDING_SIZE,
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.flags = 0,
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};
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