AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

ilo: simplify ilo_render invalidation

Browse Source 
ilo_render is based on ilo_builder.  We should only care if the builder
buffers are invalidated, or if the hardware context is invalidated.  Replace
ilo_render_invalidate() with flags by ilo_render_invalidate_builder() and
ilo_render_invalidate_hw().

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
This commit is contained in:
Chia-I Wu
2014-09-24 15:24:25 +08:00
parent ce2bda300d
commit e3451552d2
7 changed files with 83 additions and 86 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/ilo/ilo_context.c
+2 -5
View File
@@ -47,11 +47,8 @@ ilo_context_cp_submitted(struct ilo_cp *cp, void *data)
{
struct ilo_context *ilo = ilo_context(data);
/* invalidate the pipeline */
ilo_render_invalidate(ilo->render,
ILO_RENDER_INVALIDATE_BATCH_BO |
ILO_RENDER_INVALIDATE_STATE_BO |
ILO_RENDER_INVALIDATE_KERNEL_BO);
/* builder buffers are reallocated */
ilo_render_invalidate_builder(ilo->render);
}
static void
src/gallium/drivers/ilo/ilo_draw.c
+1 -3
View File
@@ -362,8 +362,6 @@ draw_vbo(struct ilo_context *ilo, const struct ilo_state_vector *vec)
break;
}
ilo->render->invalidate_flags = 0x0;
/* sanity check size estimation */
assert(before_space - ilo_cp_space(ilo->cp) <= max_len);
@@ -438,7 +436,7 @@ ilo_draw_rectlist(struct ilo_context *ilo)
break;
}
ilo_render_invalidate(ilo->render, ILO_RENDER_INVALIDATE_HW);
ilo_render_invalidate_hw(ilo->render);
ilo_render_emit_flush(ilo->render);
src/gallium/drivers/ilo/ilo_render.c
+20 -2
View File
@@ -88,8 +88,6 @@ ilo_render_create(struct ilo_builder *builder)
break;
}
render->invalidate_flags = ILO_RENDER_INVALIDATE_ALL;
render->workaround_bo = intel_winsys_alloc_buffer(builder->winsys,
"PIPE_CONTROL workaround", 4096, false);
if (!render->workaround_bo) {
@@ -117,6 +115,9 @@ ilo_render_create(struct ilo_builder *builder)
sample_position_8x[4 + i].y << (8 * i);
}
ilo_render_invalidate_hw(render);
ilo_render_invalidate_builder(render);
return render;
}
@@ -161,3 +162,20 @@ ilo_render_get_sample_position(const struct ilo_render *render,
*x = (float) pos[sample_index].x / 16.0f;
*y = (float) pos[sample_index].y / 16.0f;
}
void
ilo_render_invalidate_hw(struct ilo_render *render)
{
render->hw_ctx_changed = true;
}
void
ilo_render_invalidate_builder(struct ilo_render *render)
{
render->batch_bo_changed = true;
render->state_bo_changed = true;
render->instruction_bo_changed = true;
/* Kernel flushes everything. Shouldn't we set all bits here? */
render->state.current_pipe_control_dw1 = 0;
}
src/gallium/drivers/ilo/ilo_render.h
+17 -21
View File
@@ -37,15 +37,6 @@ struct ilo_cp;
struct ilo_query;
struct ilo_state_vector;
enum ilo_render_invalidate_flags {
ILO_RENDER_INVALIDATE_HW = 1 << 0,
ILO_RENDER_INVALIDATE_BATCH_BO = 1 << 1,
ILO_RENDER_INVALIDATE_STATE_BO = 1 << 2,
ILO_RENDER_INVALIDATE_KERNEL_BO = 1 << 3,
ILO_RENDER_INVALIDATE_ALL = 0xffffffff,
};
enum ilo_render_action {
ILO_RENDER_DRAW,
ILO_RENDER_FLUSH,
@@ -60,8 +51,6 @@ struct ilo_render {
const struct ilo_dev_info *dev;
struct ilo_builder *builder;
uint32_t invalidate_flags;
struct intel_bo *workaround_bo;
uint32_t packed_sample_position_1x;
@@ -83,6 +72,17 @@ struct ilo_render {
void (*emit_rectlist)(struct ilo_render *render,
const struct ilo_blitter *blitter);
bool hw_ctx_changed;
/*
* Any state that involves resources needs to be re-emitted when the
* batch bo changed. This is because we do not pin the resources and
* their offsets (or existence) may change between batch buffers.
*/
bool batch_bo_changed;
bool state_bo_changed;
bool instruction_bo_changed;
/**
* HW states.
*/
@@ -151,16 +151,6 @@ ilo_render_create(struct ilo_builder *builder);
void
ilo_render_destroy(struct ilo_render *render);
static inline void
ilo_render_invalidate(struct ilo_render *render, uint32_t flags)
{
render->invalidate_flags |= flags;
/* Kernel flushes everything. Shouldn't we set all bits here? */
render->state.current_pipe_control_dw1 = 0;
}
/**
* Estimate the size of an action.
*/
@@ -214,4 +204,10 @@ ilo_render_get_sample_position(const struct ilo_render *render,
unsigned sample_index,
float *x, float *y);
void
ilo_render_invalidate_hw(struct ilo_render *render);
void
ilo_render_invalidate_builder(struct ilo_render *render);
#endif /* ILO_RENDER_H */
src/gallium/drivers/ilo/ilo_render_gen.h
+1 -5
View File
@@ -39,10 +39,6 @@ struct gen6_draw_session {
int reduced_prim;
bool hw_ctx_changed;
bool batch_bo_changed;
bool state_bo_changed;
bool kernel_bo_changed;
bool prim_changed;
bool primitive_restart_changed;
@@ -80,7 +76,7 @@ struct gen6_rectlist_session {
};
void
gen6_draw_prepare(const struct ilo_render *r,
gen6_draw_prepare(struct ilo_render *r,
const struct ilo_state_vector *ilo,
struct gen6_draw_session *session);
src/gallium/drivers/ilo/ilo_render_gen6.c
+29 -37
View File
@@ -226,7 +226,7 @@ gen6_draw_common_select(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* PIPELINE_SELECT */
if (session->hw_ctx_changed) {
if (r->hw_ctx_changed) {
if (ilo_dev_gen(r->dev) == ILO_GEN(6))
gen6_wa_pre_non_pipelined(r);
@@ -240,7 +240,7 @@ gen6_draw_common_sip(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* STATE_SIP */
if (session->hw_ctx_changed) {
if (r->hw_ctx_changed) {
if (ilo_dev_gen(r->dev) == ILO_GEN(6))
gen6_wa_pre_non_pipelined(r);
@@ -254,12 +254,12 @@ gen6_draw_common_base_address(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* STATE_BASE_ADDRESS */
if (session->state_bo_changed || session->kernel_bo_changed ||
session->batch_bo_changed) {
if (r->state_bo_changed || r->instruction_bo_changed ||
r->batch_bo_changed) {
if (ilo_dev_gen(r->dev) == ILO_GEN(6))
gen6_wa_pre_non_pipelined(r);
gen6_state_base_address(r->builder, session->hw_ctx_changed);
gen6_state_base_address(r->builder, r->hw_ctx_changed);
/*
* From the Sandy Bridge PRM, volume 1 part 1, page 28:
@@ -441,7 +441,7 @@ gen6_draw_vf(struct ilo_render *r,
{
if (ilo_dev_gen(r->dev) >= ILO_GEN(7.5)) {
/* 3DSTATE_INDEX_BUFFER */
if (DIRTY(IB) || session->batch_bo_changed) {
if (DIRTY(IB) || r->batch_bo_changed) {
gen6_3DSTATE_INDEX_BUFFER(r->builder,
&vec->ib, false);
}
@@ -455,14 +455,14 @@ gen6_draw_vf(struct ilo_render *r,
else {
/* 3DSTATE_INDEX_BUFFER */
if (DIRTY(IB) || session->primitive_restart_changed ||
session->batch_bo_changed) {
r->batch_bo_changed) {
gen6_3DSTATE_INDEX_BUFFER(r->builder,
&vec->ib, vec->draw->primitive_restart);
}
}
/* 3DSTATE_VERTEX_BUFFERS */
if (DIRTY(VB) || DIRTY(VE) || session->batch_bo_changed)
if (DIRTY(VB) || DIRTY(VE) || r->batch_bo_changed)
gen6_3DSTATE_VERTEX_BUFFERS(r->builder, vec->ve, &vec->vb);
/* 3DSTATE_VERTEX_ELEMENTS */
@@ -499,7 +499,7 @@ gen6_draw_vf_statistics(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* 3DSTATE_VF_STATISTICS */
if (session->hw_ctx_changed)
if (r->hw_ctx_changed)
gen6_3DSTATE_VF_STATISTICS(r->builder, false);
}
@@ -521,7 +521,7 @@ gen6_draw_vs(struct ilo_render *r,
struct gen6_draw_session *session)
{
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(SAMPLER_VS) ||
session->kernel_bo_changed);
r->instruction_bo_changed);
const bool emit_3dstate_constant_vs = session->pcb_state_vs_changed;
/*
@@ -561,7 +561,7 @@ gen6_draw_gs(struct ilo_render *r,
/* 3DSTATE_GS */
if (DIRTY(GS) || DIRTY(VS) ||
session->prim_changed || session->kernel_bo_changed) {
session->prim_changed || r->instruction_bo_changed) {
const int verts_per_prim = u_vertices_per_prim(session->reduced_prim);
gen6_3DSTATE_GS(r->builder, vec->gs, vec->vs, verts_per_prim);
@@ -628,7 +628,7 @@ gen6_draw_gs_svbi(struct ilo_render *r,
0, 0, r->state.so_max_vertices,
false);
if (session->hw_ctx_changed) {
if (r->hw_ctx_changed) {
int i;
/*
@@ -717,13 +717,13 @@ gen6_draw_wm(struct ilo_render *r,
/* 3DSTATE_WM */
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) || DIRTY(DSA) ||
DIRTY(RASTERIZER) || session->kernel_bo_changed) {
DIRTY(RASTERIZER) || r->instruction_bo_changed) {
const int num_samplers = vec->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = vec->blend->dual_blend;
const bool cc_may_kill = (vec->dsa->dw_alpha ||
vec->blend->alpha_to_coverage);
if (ilo_dev_gen(r->dev) == ILO_GEN(6) && session->hw_ctx_changed)
if (ilo_dev_gen(r->dev) == ILO_GEN(6) && r->hw_ctx_changed)
gen6_wa_pre_3dstate_wm_max_threads(r);
gen6_3DSTATE_WM(r->builder, vec->fs, num_samplers,
@@ -763,7 +763,7 @@ gen6_draw_wm_depth(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
if (DIRTY(FB) || session->batch_bo_changed) {
if (DIRTY(FB) || r->batch_bo_changed) {
const struct ilo_zs_surface *zs;
uint32_t clear_params;
@@ -1395,7 +1395,7 @@ gen6_draw_states(struct ilo_render *render,
}
void
gen6_draw_prepare(const struct ilo_render *render,
gen6_draw_prepare(struct ilo_render *render,
const struct ilo_state_vector *vec,
struct gen6_draw_session *session)
{
@@ -1403,29 +1403,15 @@ gen6_draw_prepare(const struct ilo_render *render,
session->pipe_dirty = vec->dirty;
session->reduced_prim = u_reduced_prim(vec->draw->mode);
session->hw_ctx_changed =
(render->invalidate_flags & ILO_RENDER_INVALIDATE_HW);
if (session->hw_ctx_changed) {
if (render->hw_ctx_changed) {
/* these should be enough to make everything uploaded */
session->batch_bo_changed = true;
session->state_bo_changed = true;
session->kernel_bo_changed = true;
render->batch_bo_changed = true;
render->state_bo_changed = true;
render->instruction_bo_changed = true;
session->prim_changed = true;
session->primitive_restart_changed = true;
} else {
/*
* Any state that involves resources needs to be re-emitted when the
* batch bo changed. This is because we do not pin the resources and
* their offsets (or existence) may change between batch buffers.
*/
session->batch_bo_changed =
(render->invalidate_flags & ILO_RENDER_INVALIDATE_BATCH_BO);
session->state_bo_changed =
(render->invalidate_flags & ILO_RENDER_INVALIDATE_STATE_BO);
session->kernel_bo_changed =
(render->invalidate_flags & ILO_RENDER_INVALIDATE_KERNEL_BO);
session->prim_changed =
(render->state.reduced_prim != session->reduced_prim);
session->primitive_restart_changed =
@@ -1439,7 +1425,7 @@ gen6_draw_emit(struct ilo_render *render,
struct gen6_draw_session *session)
{
/* force all states to be uploaded if the state bo changed */
if (session->state_bo_changed)
if (render->state_bo_changed)
session->pipe_dirty = ILO_DIRTY_ALL;
else
session->pipe_dirty = vec->dirty;
@@ -1447,7 +1433,7 @@ gen6_draw_emit(struct ilo_render *render,
session->emit_draw_states(render, vec, session);
/* force all commands to be uploaded if the HW context changed */
if (session->hw_ctx_changed)
if (render->hw_ctx_changed)
session->pipe_dirty = ILO_DIRTY_ALL;
else
session->pipe_dirty = vec->dirty;
@@ -1460,6 +1446,12 @@ gen6_draw_end(struct ilo_render *render,
const struct ilo_state_vector *vec,
struct gen6_draw_session *session)
{
render->hw_ctx_changed = false;
render->batch_bo_changed = false;
render->state_bo_changed = false;
render->instruction_bo_changed = false;
render->state.reduced_prim = session->reduced_prim;
render->state.primitive_restart = vec->draw->primitive_restart;
}
src/gallium/drivers/ilo/ilo_render_gen7.c
+13 -13
View File
@@ -270,7 +270,7 @@ gen7_draw_common_pcb_alloc(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,PS} */
if (session->hw_ctx_changed) {
if (r->hw_ctx_changed) {
/*
* Push constant buffers are only allowed to take up at most the first
* 16KB of the URB. Split the space evenly for VS and FS.
@@ -339,7 +339,7 @@ gen7_draw_vs(struct ilo_render *r,
/* see gen6_draw_vs() */
const bool emit_3dstate_constant_vs = session->pcb_state_vs_changed;
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(SAMPLER_VS) ||
session->kernel_bo_changed);
r->instruction_bo_changed);
/* emit depth stall before any of the VS commands */
if (emit_3dstate_binding_table || emit_3dstate_sampler_state ||
@@ -380,13 +380,13 @@ gen7_draw_hs(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* 3DSTATE_CONSTANT_HS and 3DSTATE_HS */
if (session->hw_ctx_changed) {
if (r->hw_ctx_changed) {
gen7_3DSTATE_CONSTANT_HS(r->builder, 0, 0, 0);
gen7_3DSTATE_HS(r->builder, NULL, 0);
}
/* 3DSTATE_BINDING_TABLE_POINTERS_HS */
if (session->hw_ctx_changed)
if (r->hw_ctx_changed)
gen7_3DSTATE_BINDING_TABLE_POINTERS_HS(r->builder, 0);
}
@@ -396,7 +396,7 @@ gen7_draw_te(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* 3DSTATE_TE */
if (session->hw_ctx_changed)
if (r->hw_ctx_changed)
gen7_3DSTATE_TE(r->builder);
}
@@ -406,13 +406,13 @@ gen7_draw_ds(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* 3DSTATE_CONSTANT_DS and 3DSTATE_DS */
if (session->hw_ctx_changed) {
if (r->hw_ctx_changed) {
gen7_3DSTATE_CONSTANT_DS(r->builder, 0, 0, 0);
gen7_3DSTATE_DS(r->builder, NULL, 0);
}
/* 3DSTATE_BINDING_TABLE_POINTERS_DS */
if (session->hw_ctx_changed)
if (r->hw_ctx_changed)
gen7_3DSTATE_BINDING_TABLE_POINTERS_DS(r->builder, 0);
}
@@ -423,7 +423,7 @@ gen7_draw_gs(struct ilo_render *r,
struct gen6_draw_session *session)
{
/* 3DSTATE_CONSTANT_GS and 3DSTATE_GS */
if (session->hw_ctx_changed) {
if (r->hw_ctx_changed) {
gen7_3DSTATE_CONSTANT_GS(r->builder, 0, 0, 0);
gen7_3DSTATE_GS(r->builder, NULL, 0);
}
@@ -456,7 +456,7 @@ gen7_draw_sol(struct ilo_render *r,
so_info = ilo_shader_get_kernel_so_info(shader);
/* 3DSTATE_SO_BUFFER */
if ((DIRTY(SO) || dirty_sh || session->batch_bo_changed) &&
if ((DIRTY(SO) || dirty_sh || r->batch_bo_changed) &&
vec->so.enabled) {
int i;
@@ -542,13 +542,13 @@ gen7_draw_wm(struct ilo_render *r,
/* 3DSTATE_PS */
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) ||
session->kernel_bo_changed) {
r->instruction_bo_changed) {
const int num_samplers = vec->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = vec->blend->dual_blend;
if ((ilo_dev_gen(r->dev) == ILO_GEN(7) ||
ilo_dev_gen(r->dev) == ILO_GEN(7.5)) &&
session->hw_ctx_changed)
r->hw_ctx_changed)
gen7_wa_pre_3dstate_ps_max_threads(r);
gen7_3DSTATE_PS(r->builder, vec->fs, num_samplers, dual_blend);
@@ -565,7 +565,7 @@ gen7_draw_wm(struct ilo_render *r,
const bool emit_3dstate_ps =
(DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND));
const bool emit_3dstate_depth_buffer =
(DIRTY(FB) || DIRTY(DSA) || session->state_bo_changed);
(DIRTY(FB) || DIRTY(DSA) || r->state_bo_changed);
if (emit_3dstate_ps ||
session->pcb_state_fs_changed ||
@@ -582,7 +582,7 @@ gen7_draw_wm(struct ilo_render *r,
}
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
if (DIRTY(FB) || session->batch_bo_changed) {
if (DIRTY(FB) || r->batch_bo_changed) {
const struct ilo_zs_surface *zs;
uint32_t clear_params;