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intel/isl: Add more parameters to isl_tiling_get_info

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They are not used yet but the layout of Yf and Ys tiles are dependent on
these parameters.  While we're here, better document the function.

Rework:
* Nanley: Update crocus.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
This commit is contained in:
Jason Ekstrand
2018-02-21 14:57:46 -08:00
committed by Marge Bot
parent 5200a99062
commit e307d46eab
5 changed files with 47 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/gallium/drivers/crocus/crocus_blt.c
+9 -6
View File
@@ -69,8 +69,9 @@ blt_set_alpha_to_one(struct crocus_batch *batch,
uint32_t tile_x, tile_y;
uint64_t offset_B;
ASSERTED uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(dst->surf.tiling,
cpp * 8, dst->surf.row_pitch_B,
isl_tiling_get_intratile_offset_el(dst->surf.tiling, dst->surf.dim,
cpp * 8, dst->surf.samples,
dst->surf.row_pitch_B,
dst->surf.array_pitch_el_rows,
chunk_x, chunk_y, 0, 0,
&offset_B,
@@ -324,8 +325,9 @@ static bool crocus_emit_blt(struct crocus_batch *batch,
uint64_t src_offset;
uint32_t src_tile_x, src_tile_y;
ASSERTED uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(src->surf.tiling,
src_cpp * 8, src->surf.row_pitch_B,
isl_tiling_get_intratile_offset_el(src->surf.tiling, src->surf.dim,
src_cpp * 8, src->surf.samples,
src->surf.row_pitch_B,
src->surf.array_pitch_el_rows,
src_x + chunk_x, src_y + chunk_y, 0, 0,
&src_offset,
@@ -336,8 +338,9 @@ static bool crocus_emit_blt(struct crocus_batch *batch,
uint64_t dst_offset;
uint32_t dst_tile_x, dst_tile_y;
isl_tiling_get_intratile_offset_el(dst->surf.tiling,
dst_cpp * 8, dst->surf.row_pitch_B,
isl_tiling_get_intratile_offset_el(dst->surf.tiling, dst->surf.dim,
dst_cpp * 8, dst->surf.samples,
dst->surf.row_pitch_B,
dst->surf.array_pitch_el_rows,
dst_x + chunk_x, dst_y + chunk_y, 0, 0,
&dst_offset,
src/intel/blorp/blorp_blit.c
+3 -2
View File
@@ -2198,8 +2198,9 @@ shrink_surface_params(const struct isl_device *dev,
x_offset_sa = (uint32_t)*x0 * px_size_sa.w + info->tile_x_sa;
y_offset_sa = (uint32_t)*y0 * px_size_sa.h + info->tile_y_sa;
uint32_t tile_z_sa, tile_a;
isl_tiling_get_intratile_offset_sa(info->surf.tiling,
info->surf.format, info->surf.row_pitch_B,
isl_tiling_get_intratile_offset_sa(info->surf.tiling, info->surf.dim,
info->surf.format, info->surf.samples,
info->surf.row_pitch_B,
info->surf.array_pitch_el_rows,
x_offset_sa, y_offset_sa, 0, 0,
&offset_B,
src/intel/isl/isl.c
+24 -10
View File
@@ -303,13 +303,20 @@ isl_device_get_sample_counts(struct isl_device *dev)
/**
* Returns an isl_tile_info representation of the given isl_tiling when
* combined with a format of the given size.
* combined when used in the given configuration.
*
* @param[out] info is written only on success
* @param[in] tiling The tiling format to introspect
* @param[in] dim The dimensionality of the surface being tiled
* @param[in] format_bpb The number of bits per surface element (block) for
* the surface being tiled
* @param[in] samples The samples in the surface being tiled
* @param[out] tile_info Return parameter for the tiling information
*/
void
isl_tiling_get_info(enum isl_tiling tiling,
enum isl_surf_dim dim,
uint32_t format_bpb,
uint32_t samples,
struct isl_tile_info *tile_info)
{
const uint32_t bs = format_bpb / 8;
@@ -324,7 +331,7 @@ isl_tiling_get_info(enum isl_tiling tiling,
*/
assert(tiling == ISL_TILING_X || tiling == ISL_TILING_Y0);
assert(bs % 3 == 0 && isl_is_pow2(format_bpb / 3));
isl_tiling_get_info(tiling, format_bpb / 3, tile_info);
isl_tiling_get_info(tiling, dim, format_bpb / 3, samples, tile_info);
return;
}
@@ -1639,7 +1646,7 @@ isl_surf_init_s(const struct isl_device *dev,
return false;
struct isl_tile_info tile_info;
isl_tiling_get_info(tiling, fmtl->bpb, &tile_info);
isl_tiling_get_info(tiling, info->dim, fmtl->bpb, info->samples, &tile_info);
const enum isl_dim_layout dim_layout =
isl_surf_choose_dim_layout(dev, info->dim, tiling, info->usage);
@@ -1824,7 +1831,8 @@ isl_surf_get_tile_info(const struct isl_surf *surf,
struct isl_tile_info *tile_info)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
isl_tiling_get_info(surf->tiling, fmtl->bpb, tile_info);
isl_tiling_get_info(surf->tiling, surf->dim, fmtl->bpb,
surf->samples, tile_info);
}
bool
@@ -2483,7 +2491,7 @@ get_image_offset_sa_gfx6_stencil_hiz(const struct isl_surf *surf,
isl_surf_get_image_alignment_sa(surf);
struct isl_tile_info tile_info;
isl_tiling_get_info(surf->tiling, fmtl->bpb, &tile_info);
isl_surf_get_tile_info(surf, &tile_info);
const struct isl_extent2d tile_extent_sa = {
.w = tile_info.logical_extent_el.w * fmtl->bw,
.h = tile_info.logical_extent_el.h * fmtl->bh,
@@ -2699,7 +2707,8 @@ isl_surf_get_image_offset_B_tile_el(const struct isl_surf *surf,
&total_array_offset);
uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
isl_tiling_get_intratile_offset_el(surf->tiling, surf->dim,
fmtl->bpb, surf->samples,
surf->row_pitch_B,
surf->array_pitch_el_rows,
total_x_offset_el,
@@ -2748,7 +2757,8 @@ isl_surf_get_image_range_B_tile(const struct isl_surf *surf,
const uint32_t end_array_slice = start_array_slice;
UNUSED uint32_t x_offset_el, y_offset_el, z_offset_el, array_slice;
isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
isl_tiling_get_intratile_offset_el(surf->tiling, surf->dim,
fmtl->bpb, surf->samples,
surf->row_pitch_B,
surf->array_pitch_el_rows,
start_x_offset_el,
@@ -2761,7 +2771,8 @@ isl_surf_get_image_range_B_tile(const struct isl_surf *surf,
&z_offset_el,
&array_slice);
isl_tiling_get_intratile_offset_el(surf->tiling, fmtl->bpb,
isl_tiling_get_intratile_offset_el(surf->tiling, surf->dim,
fmtl->bpb, surf->samples,
surf->row_pitch_B,
surf->array_pitch_el_rows,
end_x_offset_el,
@@ -2937,7 +2948,9 @@ isl_surf_get_uncompressed_surf(const struct isl_device *dev,
void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
enum isl_surf_dim dim,
uint32_t bpb,
uint32_t samples,
uint32_t row_pitch_B,
uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
@@ -2952,6 +2965,7 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
{
if (tiling == ISL_TILING_LINEAR) {
assert(bpb % 8 == 0);
assert(samples == 1);
assert(total_z_offset_el == 0 && total_array_offset == 0);
*tile_offset_B = (uint64_t)total_y_offset_el * row_pitch_B +
(uint64_t)total_x_offset_el * (bpb / 8);
@@ -2963,7 +2977,7 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
}
struct isl_tile_info tile_info;
isl_tiling_get_info(tiling, bpb, &tile_info);
isl_tiling_get_info(tiling, dim, bpb, samples, &tile_info);
/* Pitches must make sense with the tiling */
assert(row_pitch_B % tile_info.phys_extent_B.width == 0);
src/intel/isl/isl.h
+8 -2
View File
@@ -1988,7 +1988,9 @@ isl_has_matching_typed_storage_image_format(const struct intel_device_info *devi
void
isl_tiling_get_info(enum isl_tiling tiling,
enum isl_surf_dim dim,
uint32_t format_bpb,
uint32_t samples,
struct isl_tile_info *tile_info);
static inline enum isl_tiling
@@ -2699,7 +2701,9 @@ isl_surf_get_uncompressed_surf(const struct isl_device *dev,
*/
void
isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
enum isl_surf_dim dim,
uint32_t bpb,
uint32_t samples,
uint32_t row_pitch_B,
uint32_t array_pitch_el_rows,
uint32_t total_x_offset_el,
@@ -2737,7 +2741,9 @@ isl_tiling_get_intratile_offset_el(enum isl_tiling tiling,
*/
static inline void
isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling,
enum isl_surf_dim dim,
enum isl_format format,
uint32_t samples,
uint32_t row_pitch_B,
uint32_t array_pitch_el_rows,
uint32_t total_x_offset_sa,
@@ -2763,8 +2769,8 @@ isl_tiling_get_intratile_offset_sa(enum isl_tiling tiling,
const uint32_t total_y_offset_el = total_y_offset_sa / fmtl->bh;
const uint32_t total_z_offset_el = total_z_offset_sa / fmtl->bd;
isl_tiling_get_intratile_offset_el(tiling, fmtl->bpb, row_pitch_B,
array_pitch_el_rows,
isl_tiling_get_intratile_offset_el(tiling, dim, fmtl->bpb, samples,
row_pitch_B, array_pitch_el_rows,
total_x_offset_el,
total_y_offset_el,
total_z_offset_el,
src/mesa/drivers/dri/i965/brw_blit.c
+3 -2
View File
@@ -169,8 +169,9 @@ get_blit_intratile_offset_el(const struct brw_context *brw,
uint32_t *y_offset_el)
{
ASSERTED uint32_t z_offset_el, array_offset;
isl_tiling_get_intratile_offset_el(mt->surf.tiling,
mt->cpp * 8, mt->surf.row_pitch_B,
isl_tiling_get_intratile_offset_el(mt->surf.tiling, mt->surf.dim,
mt->cpp * 8, mt->surf.samples,
mt->surf.row_pitch_B,
mt->surf.array_pitch_el_rows,
total_x_offset_el, total_y_offset_el, 0, 0,
tile_offset_B,