i965/gen9: Disable Mip Tail for YF/YS tiled surfaces
Disabling miptails fixed the buffer corruption happening in FBO which use YF/YS tiled renderbuffer or texture as color attachment. Spec recommends disabling mip tails only for non-mip-mapped surfaces. But, without disabling miptails I couldn't get correct data out of mipmapped YF/YS tiled surface. We need better understanding of miptails before start using them. For now this patch helps move things forward. Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
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@@ -598,6 +598,9 @@
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#define GEN9_SURFACE_TRMODE_TILEYF 1
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#define GEN9_SURFACE_TRMODE_TILEYS 2
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#define GEN9_SURFACE_MIP_TAIL_START_LOD_SHIFT 8
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#define GEN9_SURFACE_MIP_TAIL_START_LOD_MASK INTEL_MASK(11, 8)
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/* Surface state DW6 */
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#define GEN7_SURFACE_MCS_ENABLE (1 << 0)
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#define GEN7_SURFACE_MCS_PITCH_SHIFT 3
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@@ -255,8 +255,11 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
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surf[5] = SET_FIELD(min_level - mt->first_level, GEN7_SURFACE_MIN_LOD) |
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(max_level - min_level - 1); /* mip count */
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if (brw->gen >= 9)
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if (brw->gen >= 9) {
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surf[5] |= SET_FIELD(tr_mode, GEN9_SURFACE_TRMODE);
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/* Disable Mip Tail by setting a large value. */
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surf[5] |= SET_FIELD(15, GEN9_SURFACE_MIP_TAIL_START_LOD);
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}
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if (aux_mt) {
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surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
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@@ -478,8 +481,11 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
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surf[5] = irb->mt_level - irb->mt->first_level;
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if (brw->gen >= 9)
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if (brw->gen >= 9) {
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surf[5] |= SET_FIELD(tr_mode, GEN9_SURFACE_TRMODE);
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/* Disable Mip Tail by setting a large value. */
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surf[5] |= SET_FIELD(15, GEN9_SURFACE_MIP_TAIL_START_LOD);
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}
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if (aux_mt) {
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surf[6] = SET_FIELD(mt->qpitch / 4, GEN8_SURFACE_AUX_QPITCH) |
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